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SE97TK,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P55
SE97_7 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 07 — 29 January 2010 10 of 55
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
7.3.2 EVENT thresholds
7.3.2.1 Alarm window
The device provides a comparison window with an UPPER trip point and a LOWER trip
point, programmed through the Upper Boundary Alarm Trip register (02h), and Lower
Boundary Alarm Trip register (03h). The Upper Boundary Alarm Trip register holds the
upper temperature trip point, while the Lower Boundary Alarm Trip register holds the lower
temperature trip point as modified by hysteresis as programmed in the Configuration
register. When enabled, the EVENT
output triggers whenever entering or exiting (crossing
above or below) the alarm window.
• Advisory note:
– NXP Device: The EVENT
output can be cleared through the Clear EVENT bit
(CEVNT) or SMBus ALERT.
– Competitor Device: The EVENT
output can be cleared only through the
Clear EVENT
bit (CEVNT).
– Work-around: Only clear EVENT
output using the Clear EVENT bit (CEVNT).
– There will be no change to NXP devices.
The Upper Boundary Alarm Trip should always be set above the Lower Boundary Alarm
Trip.
• Advisory note:
– NXP device: Requires one conversion cycle (125 ms) after setting the alarm
window before comparing the alarm limit with temperature register to ensure that
there is correct data in the temperature register before comparing with the Alarm
Window and operating EVENT
output.
– Competitor devices: Compares the alarm limit with temperature register at any
time, so they get the EVENT
output immediately when new UPPER or LOWER
Alarm Windows and the EVENT
output are set at the same time.
– Work-around: Wait at least 125 ms before enabling EVENT
output (EOCTL = 1).
– SE97B will compare alarm window and temperature register immediately.
7.3.2.2 Critical trip
The T
th(crit)
temperature setting is programmed in the Critical Alarm Trip register (04h) as
modified by hysteresis as programmed in the Configuration register. When the
temperature reaches the critical temperature value in this register (and EVENT
is
enabled), the EVENT
output asserts and cannot be de-asserted until the temperature
drops below the critical temperature threshold. The Event cannot be cleared through the
Clear EVENT
bit (CEVNT) or SMBus ALERT.
The Critical Alarm Trip should always be set above the Upper Boundary Alarm Trip.
• Advisory note:
– NXP device: Requires one conversion cycle (125 ms) after setting the Alarm
Window before comparing the alarm limit with temperature register to ensure that
there is correct data in the temperature register before comparing with the Alarm
Window and operating EVENT
output.
SE97_7 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 07 — 29 January 2010 11 of 55
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
– Competitor devices: Compares the Alarm Window with temperature register at any
time, so they get the EVENT
output immediately when new T
th(crit)
and EVENT
output are set at the same time.
– Work-around: Wait at least 125 ms before enabling EVENT
output (EOCTL = 1).
Intel will change Nehalem BIOS so that T
th(crit)
is set for more than 125 ms before
EVENT
output is enabled and Event value is checked.
1. Set T
th(crit)
.
2. Doing something else (make sure that exceeds 125 ms).
3. Enable the EVENT
output (EOCTL = 1).
4. Wait 20 μs.
5. Read Event value.
– SE97B will compare alarm window and temperature register immediately.
7.3.3 EVENT operation modes
7.3.3.1 Comparator mode
In comparator mode, the EVENT
output behaves like a window-comparator output that
asserts when the temperature is outside the window (e.g., above the value programmed in
the Upper Boundary Alarm Trip register or below the value programmed in the Lower
Boundary Alarm Trip register or above the Critical Alarm Trip resister if T
th(crit)
only is
selected). Reads/writes on the registers do not affect the EVENT
output in comparator
mode. The EVENT
signal remains asserted until the temperature goes inside the alarm
window or the window thresholds are reprogrammed so that the current temperature is
within the alarm window.
The comparator mode is useful for thermostat-type applications, such as turning on a
cooling fan or triggering a system shutdown when the temperature exceeds a safe
operating range.
7.3.3.2 Interrupt mode
In interrupt mode, EVENT
asserts whenever the temperature crosses an alarm window
threshold. After such an event occurs, writing a 1 to the Clear EVENT
bit (CEVNT) in the
configuration register de-asserts the EVENT
output until the next trigger condition occurs.
In interrupt mode, EVENT
asserts when the temperature crosses the alarm upper
boundary. If the EVENT
output is cleared and the temperature continues to increase until
it crosses the critical temperature threshold, EVENT
asserts again. Because the
temperature is greater than the critical temperature threshold, a Clear EVENT
command
does not clear the EVENT
output. Once the temperature drops below the critical
temperature, EVENT
de-asserts immediately.
• Advisory note:
– NXP device: If the EVENT
output is not cleared before the temperature goes
above the critical temperature threshold EVENT
de-asserts immediately when
temperature drops below the critical temperature.
– Competitor devices: If the EVENT
output is not cleared before or when the
temperature is in the critical temperature threshold, EVENT
will remain asserted
after the temperature drops below the critical temperature until a Clear EVENT
command.
SE97_7 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 07 — 29 January 2010 12 of 55
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
– Work-around: Always clear the EVENT output before temperature exceeds the
critical temperature.
– SE97B will keep EVENT
asserted after the temperature drops below the critical
temperature until a Clear EVENT
command de-asserts EVENT.
7.4 Conversion rate
The conversion time is the amount of time required for the ADC to complete a
temperature measurement for the local temperature sensor. The conversion rate is the
inverse of the conversion period which describes the number of cycles the temperature
measurement completes in one second—the faster the conversion rate, the faster the
temperature reading is updated. The SE97’s conversion rate is at least 8 Hz or 125 ms.
7.4.1 What temperature is read when conversion is in progress
The SE97 has been designed to ensure a valid temperature is always available. When a
read to the temperature register is initiated through the SMBus, the device checks to see if
the temperature conversion process (Analog-to-Digital conversion) is complete and a new
temperature is available:
• If the temperature conversion process is complete, then the new temperature value is
sent out on the SMBus.
• If the temperature conversion process in not complete, then the previous temperature
value is sent out on the SMBus.
It is possible that while SMBus Master is reading the temperature register, a new
temperature conversion completes. However, this will not affect the data (MSB or LSB)
that is being shifted out. On the next read of the temperature register, the new
temperature value will be shifted out.
7.5 Power-up default condition
After power-on, the SE97 is initialized to the following default condition:
• Starts monitoring local sensor
• EVENT register is cleared; EVENT output is pulled HIGH by external pull-ups
• EVENT hysteresis is defaulted to 0 °C
• Command pointer is defaulted to ‘00h’
• Critical Temp, Alarm Temperature Upper and Lower Boundary Trip register are
defaulted to 0 °C
• Capability register is defaulted to ‘0017h’ for the B grade
• Operational mode: comparator
• SMBus register is defaulted to ‘00h’
7.6 Device initialization
SE97 temperature sensors have programmable registers, which, upon power-up, default
to zero. The open-drain EVENT
output is default to being disabled, comparator mode and
active LOW. The alarm trigger registers default to being unprotected. The configuration
registers, upper and lower alarm boundary registers and critical temperature window are
defaulted to zero and need to be programmed to the desired values. SMBus TIMEOUT
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P55

SE97TK,118

Mfr. #:
Buy SE97TK,118
Manufacturer:
NXP Semiconductors
Description:
IC TEMP SENSOR DIMM 8-HVSON
Lifecycle:
New from this manufacturer.
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