SE97_7 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 07 — 29 January 2010 23 of 55
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
7.11 Hot plugging
The SE97 can be used in hot plugging applications. Internal circuitry prevents damaging
current backflow through the device when it is powered down, but with the I
2
C-bus,
EVENT
or address pins still connected. The open-drain SDA and EVENT pins (SCL and
address pins are input only) effectively places the outputs in a high-impedance state
during power-up and power-down, which prevents driver conflict and bus contention. The
50 ns noise filter will filter out any insertion glitches from the state machine, which is very
robust and not prone to false operation.
The device needs a proper power-up sequence to reset itself, not only for the device
I
2
C-bus and I/O initial states, but also to load specific pre-defined data or calibration data
into its operational registers. The power-up sequence should occur correctly with a fast
ramp rate and the I
2
C-bus active. The SE97 might not respond immediately after
power-up, but it should not damage the part if the power-up sequence is abnormal. If the
SCL line is held LOW, the part will not exit the power-on reset mode since the part is held
in reset until SCL is released.
8. Register descriptions
8.1 Register overview
This section describes all the registers used in the SE97. The registers are used for
latching the temperature reading, storing the low and high temperature limits, configuring,
the hysteresis threshold and the ADC, as well as reporting status. The device uses the
pointer register to access these registers. Read registers, as the name implies, are used
for read only, and the write registers are for write only. Any attempt to read from a
write-only register will result in reading ‘0’s. Writing to a read-only register will have no
effect on the read even though the write command is acknowledged. The Pointer register
is an 8-bit register. All other registers are 16-bit.
A write to reserved registers my cause unexpected results which may result in requiring a
reset by removing and re-applying its power.
Table 8. Register summary
Address (hex) Default state (hex) Register name
n/a n/a Pointer register
00h 0017h Capability register (B grade = 0017h)
01h 0000h Configuration register
02h 0000h Upper Boundary Alarm Trip register
03h 0000h Lower Boundary Alarm Trip register
04h 0000h Critical Alarm Trip register
05h n/a Temperature register
06h 1131h Manufacturer ID register
07h A200h Device ID/Revision register for SE97PW, SE97TK
A201h Device ID/Revision register for SE97TP, SE97TL
08h to 21h 0000h reserved registers
22h 0000h SMBus register
23h to FFh 0000h reserved registers
