SE97_7 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 07 — 29 January 2010 31 of 55
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
8.5.2 Lower Boundary Alarm Trip register (16-bit read/write)
The value is the lower threshold temperature value for Alarm mode. The data format is
2’s complement with bit 2 = 0.25 °C. RFU bits will always report zero. Interrupts will
respond to the presently programmed boundary values. If boundary values are being
altered in-system, it is advised to turn off interrupts until a known state can be obtained to
avoid superfluous interrupt activity.
8.5.3 Critical Alarm Trip register (16-bit read/write)
The value is the critical temperature. The data format is 2’s complement with
bit 2 = 0.25 °C. RFU bits will always report zero.
Table 17. Lower Boundary Alarm Trip register bit allocation
Bit 15 14 13 12 11 10 9 8
Symbol RFU SIGN LBT
Default 00000000
Access R R R R/W R/W R/W R/W R/W
Bit 7 6 5 4 3 2 1 0
Symbol LBT RFU
Default 00000000
Access R/W R/W R/W R/W R/W R/W R R
Table 18. Lower Boundary Alarm Trip register bit description
Bit Symbol Description
15:13 RFU reserved; always ‘0’
12 SIGN Sign (MSB)
11:2 LBT Lower Boundary Alarm Trip Temperature (LSB = 0.25 °C)
1:0 RFU reserved; always ‘0
Table 19. Lower Boundary Alarm Trip register bit allocation
Bit 15 14 13 12 11 10 9 8
Symbol RFU SIGN CT
Default 00000000
Access R R R R/W R/W R/W R/W R/W
Bit 7 6 5 4 3 2 1 0
Symbol CT RFU
Default 00000000
Access R/W R/W R/W R/W R/W R/W R R
Table 20. Critical Alarm Trip register bit description
Bit Symbol Description
15:13 RFU reserved; always ‘0’
12 SIGN Sign (MSB)
11:2 CT Critical Alarm Trip Temperature (LSB = 0.25 °C)
1:0 RFU reserved; always ‘0
SE97_7 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 07 — 29 January 2010 32 of 55
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
8.6 Temperature register (16-bit read-only)
Table 21. Temperature register bit allocation
Bit 15 14 13 12 11 10 9 8
Symbol ACT AAW BAW SIGN TEMP
Default 00000000
Access RRRRRRRR
Bit 7 6 5 4 3 2 1 0
Symbol TEMP RFU
Default 00000000
Access RRRRRRRR
Table 22. Temperature register bit description
Bit Symbol Description
15 ACT Above Critical Trip.
Increasing T
amb
:
0 — T
amb
<T
th(crit)
1 — T
amb
T
th(crit)
Decreasing T
amb
:
0 — T
amb
<T
th(crit)
T
hys
1 — T
amb
T
th(crit)
T
hys
14 AAW Above Alarm Window.
Increasing T
amb
:
0 — T
amb
T
trip(u)
1 — T
amb
>T
trip(u)
Decreasing T
amb
:
0 — T
amb
T
trip(u)
T
hys
1 — T
amb
>T
trip(u)
T
hys
13 BAW Below Alarm Window.
Increasing T
amb
:
0 — T
amb
T
trip(l)
1 — T
amb
<T
trip(l)
Decreasing T
amb
:
0 — T
amb
T
trip(l)
T
hys
1 — T
amb
<T
trip(l)
T
hys
12 SIGN Sign bit.
0 — positive temperature value
1 — negative temperature value
11:1 TEMP Temperature Value (2’s complement). (LSB = 0.125 °C)
0 RFU reserved; always ‘0’
SE97_7 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 07 — 29 January 2010 33 of 55
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
8.7 Manufacturer’s ID register (16-bit read-only)
The SE97 Manufacturer’s ID register is intended to match NXP Semiconductors PCI SIG
(1131h).
8.8 Device ID register
The SE97 device ID is A2h. The device revision varies by device.
[1] 00 for SE97PW, SE97TK (original) is 00h.
01 for SE97TL, SE97TP (improved V
POR
and EVENT I
OL
) is 01h.
Table 23. Manufacturer’s ID register bit allocation
Bit 15 14 13 12 11 10 9 8
Symbol Manufacturer ID
Default 00010001
Access RRRRRRRR
Bit 7 6 5 4 3 2 1 0
Symbol (continued)
Default 00110001
Access RRRRRRRR
Table 24. Device ID register bit allocation
Bit 15 14 13 12 11 10 9 8
Symbol Device ID
Default 10100010
Access RRRRRRRR
Bit 7 6 5 4 3 2 1 0
Symbol Device revision
Default 000000
[1] [1]
Access RRRRRRRR

SE97TK,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC TEMP SENSOR DIMM 8-HVSON
Lifecycle:
New from this manufacturer.
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