UJA1075_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 27 May 2010 9 of 53
NXP Semiconductors
UJA1075
High-speed CAN/LIN core system basis chip
6.1.2 Off mode
The SBC switches to Off mode from all other modes if the battery supply drops below the
power-off detection threshold (V
th(det)poff
). In Off mode, the voltage regulators are disabled
and the bus systems are in a high-resistive state. The CAN bus pins are floating in this
mode.
As soon as the battery supply rises above the power-on detection threshold (V
th(det)pon
),
the SBC goes to Standby mode, and a system reset is executed (reset pulse width of
t
w(rst)
, long or short; see Section 6.5.1 and Table 11).
6.1.3 Standby mode
The SBC will enter Standby mode:
• From Off mode if V
BAT
rises above the power-on detection threshold (V
th(det)pon
)
• From Sleep mode on the occurrence of a CAN, LIN or local wake-up event
• From Overtemp mode if the chip temperature drops below the overtemperature
protection release threshold, T
th(rel)otp
• From Normal mode if bit MC is set to 00 or a system reset is performed (see
Section 6.5
)
In Standby mode, V1 is switched on. The CAN and LIN transceivers will either be in a
low-power state (Lowpower mode; STBCC/STBCL = 1; see Table 6
) with bus wake-up
detection enabled or completely switched off (Off mode; STBCC/STBCL = 0) - see
Section 6.7.1
and Section 6.8.1. The watchdog can be running in Timeout mode or Off
mode, depending on the state of the WDOFF pin and the setting of the watchdog mode
control bit (WMC) in the WD_and_Status register (Table 4
).
The SBC will exit Standby mode if:
• Normal mode is selected by setting bits MC to 10 (V2 disabled) or 11 (V2 enabled)
• Sleep mode is selected by setting bits MC to 01
• The chip temperature rises above the OTP activation threshold, T
th(act)otp
, causing the
SBC to enter Overtemp mode
6.1.4 Normal mode
Normal mode is selected from Standby mode by setting bits MC in the Mode_Control
register (Table 5
) to 10 (V2 disabled) or 11 (V2 enabled).
In Normal mode, the CAN physical layer will be enabled (Active mode; STBCC = 0; see
Table 6
) or in a low-power state (Lowpower mode; STBCC = 1) with bus wake-up
detection active.
In Normal mode, the LIN physical layer will be enabled (Active mode; STBCL = 0; see
Table 6
) or in a low-power state (Lowpower mode; STBCL = 1) with bus wake-up
detection active.
The SBC will exit Normal mode if:
• Standby mode is selected by setting bits MC to 00
• Sleep mode is selected by setting bits MC to 01
• A system reset is generated (see Section 6.1.3; the SBC will enter Standby mode)
