XR16L2552
37
REV. 1.1.2 2.25V TO 5.5V DUART WITH 16-BYTE FIFO
AC ELECTRICAL CHARACTERISTICS
Unless Otherwise Noted: TA=-40
o
to +85
o
C, Vcc is 2.25V to 5.5V,
70 pF load where applicable
SYMBOL PARAMETER
LIMITS
2.5
MIN MAX
LIMITS
3.3
MIN MAX
LIMITS
5.0
MIN MAX
UNIT
- Crystal Frequency 16 20 24 MHz
CLK External Clock Low/High Time 31 17 10 ns
OSC External Clock Frequency 16 30 50 MHz
T
AS
Address Setup Time 10 10 10 ns
T
AH
Address Hold Time 10 10 10 ns
T
CS
Chip Select Width 150 75 50 ns
T
RD
IOR# Strobe Width 150 75 50 ns
T
DY
Read Cycle Delay 150 75 50 ns
T
RDV
Data Access Time 125 70 45 ns
T
DD
Data Disable Time 0 45 0 30 0 30 ns
T
WR
IOW# Strobe Width 150 75 50 ns
T
DY
Write Cycle Delay 150 75 50 ns
T
DS
Data Setup Time 25 20 15 ns
T
DH
Data Hold Time 15 10 10 ns
T
WDO
Delay From IOW# To Output 150 75 50 ns
T
MOD
Delay To Set Interrupt From MODEM Input 150 75 50 ns
T
RSI
Delay To Reset Interrupt From IOR# 150 75 50 ns
T
SSI
Delay From Stop To Set Interrupt 1 1 1 Bclk
T
RRI
Delay From IOR# To Reset Interrupt 150 75 50 ns
T
SI
Delay From Stop To Interrupt 150 75 50 ns
T
INT
Delay From Initial INT Reset To Transmit
Start
824824824Bclk
T
WRI
Delay From IOW# To Reset Interrupt 150 75 50 ns
T
SSR
Delay From Stop To Set RXRDY# 1 1 1 Bclk
T
RR
Delay From IOR# To Reset RXRDY# 150 75 50 ns
T
WT
Delay From IOW# To Set TXRDY# 150 75 50 ns
T
SRT
Delay From Center of Start To Reset TXRDY# 8 8 8 Bclk
