REV. 0
–16–
AD7708/AD7718
Table I. ADC Conversion and Settling Times for Various
SF Words with CHOP = 0
SF Data Update Rate Settling Time
Word f
ADC
(Hz) t
SETTLE
(ms)
13 105.3 19.04
23 59.36 33.69
27 50.56 39.55
45 30.3 65.9
69 (Default) 19.79 101.07
91 15 133.1
182 7.5 266.6
255 5.35 373.54
The overall frequency response is the product of a sinc
3
and a
sinc response. There are sinc
3
notches at integer multiples of
3 × f
ADC
and there are sinc notches at odd integer multiples
of f
ADC
/2. The 3 dB frequency for all values of SF obeys the
following equation:
f (3 dB) = 0.24 × f
ADC
Normal-mode rejection is the major function of the digital filter
on the AD7708/AD7718. The normal mode 50 ±1 Hz rejection
with an SF word of 82 is typically –100 dB. The 60 ± 1 Hz
rejection with SF = 68 is typically –100 dB. Simultaneous 50 Hz
and 60 Hz rejection of better than 60 dB is achieved with an SF
of 69. Choosing an SF word of 69 places notches at both 50 Hz
and 60 Hz. Figures 5 to 9 show the filter rejection for a selection
of SF words.
The frequency response of the filter H (f) is as follows:
1
8
81
2
2
3
SF
SF f f
ff
ff
ff
MOD
MOD
OUT
OUT
×
×
×××
×
××
××
×
sin ( / )
sin ( / )
sin ( / )
sin ( / )
π
π
π
π
where
f
MOD
= 32,768 Hz,
SF = value programmed into SF Register,
f
OUT
= f
MOD
/(SF × 8 × 3).
The following plots show the filter frequency response for a
variety of update rates from 5 Hz to 105 Hz.
FREQUENCY Hz
0
140
200
0
650
50
100
150 200 250 300 350 400
450 500 550 600
700
ATTENUATION dB
20
120
160
180
60
100
40
80
SF = 13
OUTPUT DATA RATE = 105Hz
INPUT BANDWIDTH = 25.2Hz
FIRST NOTCH = 52.5Hz
50Hz REJECTION = 23.6dB, 50Hz1Hz REJECTION = 20.5dB
60Hz REJECTION = 14.6dB, 60Hz1Hz REJECTION = 13.6dB
Figure 5. Filter Profile with SF = 13
FREQUENCY Hz
0
80
160
0 10010
ATTENUATION dB
20 30 40 50 60 70 80 90
20
40
120
140
60
100
SF = 82
OUTPUT DATA RATE = 16.65Hz
INPUT BANDWIDTH = 4Hz
50Hz REJECTION = 171dB, 50Hz1Hz REJECTION = 100dB
60Hz REJECTION = 58dB, 60Hz1Hz REJECTION = 53dB
Figure 6. Filter Profile with SF = 82
REV. 0
AD7708/AD7718
–17–
FREQUENCY Hz
0
80
160
0 10010
ATTENUATION dB
20 30 40 50 60 70 80 90
20
40
120
140
60
100
SF = 255
OUTPUT DATA RATE = 5.35Hz
INPUT BANDWIDTH = 1.28Hz
50Hz REJECTION = 93dB, 50Hz1Hz REJECTION = 93dB
60Hz REJECTION = 74dB, 60Hz1Hz REJECTION = 68dB
Figure 7. Filter Profile with SF = 255
FREQUENCY Hz
0
80
160
0 100
10
ATTENUATION dB
20 30 40 50 60 70 80 90
20
40
120
140
60
100
SF = 69
OUTPUT DATA RATE = 19.8Hz
INPUT BANDWIDTH = 4.74Hz
FIRST NOTCH = 9.9Hz
50Hz REJECTION = 66dB, 50Hz1Hz REJECTION = 60dB
60Hz REJECTION = 117dB, 60Hz1Hz REJECTION = 94dB
Figure 8. Filter Profile with Default SF = 69 Giving Filter
Notches at Both 50 Hz and 60 Hz
FREQUENCY Hz
0
80
160
0 10010
ATTENUATION dB
20 30 40 50 60 70 80 90
20
40
120
140
60
100
SF = 68
OUTPUT DATA RATE = 20.07Hz
INPUT BANDWIDTH = 4.82Hz
50Hz REJECTION = 74dB, 50Hz1Hz REJECTION = 54.6dB
60Hz REJECTION = 147dB, 60Hz1Hz REJECTION = 101dB
Figure 9. Filter Profile with SF = 68
ADC NOISE PERFORMANCE CHOP ENABLED
(CHOP = 0)
Tables II to V show the output rms noise and output peak-to-
peak resolution in bits (rounded to the nearest 0.5 LSB) for a
selection of output update rates. The numbers are typical and
generated at a differential input voltage of 0 V with AV
DD
=
DV
DD
= 5 V and using a 2.5 V reference. The output update
rate is selected via the SF7–SF0 bits in the Filter Register. It is
important to note that the peak-to-peak resolution figures repre-
sent the resolution for which there will be no code flicker within
a six-sigma limit. The output noise comes from two sources. The
first is the electrical noise in the semiconductor devices (device
noise) used in the implementation of the modulator. Secondly,
when the analog input is converted into the digital domain,
quantization noise is added. The device noise is at a low level
and is independent of frequency. The quantization noise starts at
an even lower level but rises rapidly with increasing frequency to
become the dominant noise source. The numbers in the tables
are given for the bipolar input ranges. For the unipolar ranges
the rms noise numbers will be the same as the bipolar range, but
the peak-to-peak resolution is now based on half the signal range
which effectively means losing one bit of resolution.
REV. 0
–18–
AD7708/AD7718
Table II. Typical Output RMS Noise vs. Input Range and Update Rate for AD7718 with Chop Enabled (CHOP = 0);
Output RMS Noise in V
SF Data Update
Input Range
Word Rate (Hz) 20 mV 40 mV 80 mV 160 mV 320 mV 640 mV 1.28 V 2.56 V
13 105.3 1.50 1.50 1.60 1.75 3.50 4.50 6.70 11.75
23 59.36 1.0 1.02 1.06 1.15 1.22 1.77 3.0 5.08
27 50.56 0.95 0.95 0.98 1.00 1.10 1.66 5.0
69 19.79 0.60 0.65 0.65 0.65 0.65 0.95 1.40 2.30
255 5.35 0.35 0.35 0.37 0.37 0.37 0.51 0.82 1.25
Table III. Peak-to-Peak Resolution vs. Input Range and Update Rate for AD7718 with Chop Enabled (CHOP = 0);
Peak-to-Peak Resolution in Bits
SF Data Update
Input Range
Word Rate (Hz) 20 mV 40 mV 80 mV 160 mV 320 mV 640 mV 1.28 V 2.56 V
13 105.3 12 13 14 15 15 15.5 16 16
23 59.36 12.5 13.5 14.5 15 16 17 17 17
27 50.56 12.5 13.5 14.5 15.5 16.5 17 17 17
69 19.79 13 14 15 16 17 17.5 18 18.5
255 5.35 14 15 16 17 18 18.5 18.8 19.2
Table IV. Typical Output RMS Noise vs. Input Range and Update Rate for AD7708 with Chop Enabled ( CHOP = 0);
Output RMS Noise in V
SF Data Update
Input Range
Word Rate (Hz) 20 mV 40 mV 80 mV 160 mV 320 mV 640 mV 1.28 V 2.56 V
13 105.3 1.50 1.50 1.60 1.75 3.50 4.50 6.70 11.75
23 59.36 1.0 1.02 1.06 1.15 1.22 1.77 3.0 5.08
27 50.56 0.95 0.95 0.98 1.00 1.10 1.66 5.0
69 19.79 0.60 0.65 0.65 0.65 0.65 0.95 1.40 2.30
255 5.35 0.35 0.35 0.37 0.37 0.37 0.51 0.82 1.25
Table V. Peak-to-Peak Resolution vs. Input Range and Update Rate for AD7708 with Chop Enabled (CHOP = 0);
Peak-to-Peak Resolution in Bits
SF Data Update
Input Range
Word Rate (Hz) 20 mV 40 mV 80 mV 160 mV 320 mV 640 mV 1.28 V 2.56 V
13 105.3 12 13 14 15 15 15.5 16 16
23 59.35 12.5 13.5 14.5 15 16 16 16 16
27 50.56 12.5 13.5 14.5 15.5 16 16 16 16
69 19.79 13 14 15 16 16 16 16 16
255 5.35 14 15 16 16 16 16 16 16

AD7708BRUZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 16-Bit 8/10-Ch Low Vtg Low Pwr
Lifecycle:
New from this manufacturer.
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