AD7708BRUZ-REEL Datasheet AD7718BRZ, AD7718BRUZ, AD7708BRUZ | P31-P33

REV. 0

AD7708/AD7718

–31–

Bipolar Mode

With an analog input voltage of (–1.024 V

REF

/GAIN), the output code is 0000 Hex using the AD7708 and 000000H using the AD7718.

With an analog input voltage of 0 V, the output code is 8000Hex for the AD7708 and 800000Hex for the AD7718. With an analog

input voltage of (+1.024 V

REF

/GAIN), the output code is FFFF Hex for the AD7708 and FFFFFF Hex for the AD7718. Note the

analog inputs are pseudo bipolar inputs and the analog input voltage must remain within the common-mode input range at all times.

The output code for any analog input voltage can be represented as follows:

Code = 2

N–1

× [(AIN × GAIN/1.024 × V

REF

) + 1]

where

AIN is the analog input voltage,

N = 16 for the AD7708, and

N = 24 for the AD7718.

ADC Offset Calibration Coefficient Registers (OF0): (A3, A2, A1, A0 = 0, 1, 0, 1; Power-On-Reset = 8000(00)Hex)

The offset calibration registers are 16-bit registers on the AD7708 and 24-bit registers on the AD7718. These registers hold the offset

calibration coefficient for the ADC. The power-on-reset value of the internal zero-scale calibration coefficient registers is 8000(00).

There are five offset registers available, one for each of the fully differential input channels. Calibration register pairs are shared when

operating in pseudo-differential input mode. However, these bytes will be automatically overwritten if an internal or system zero-scale

calibration is initiated by the user via MD2–MD0 bits in the MODE register. The channel bits, in association with the communication

register address for the OF0 register, allow access to this register. This register is a read/write register. The calibration register can

only be written to if the ADC is inactive (MD bits in the mode register = 000 or 001). Reading of the calibration register does not

clear the RDY bit.

ADC Gain Calibration Coefficient Register (GNO): (A3, A2, A1, A0 = 0, 1, 1, 0; Power-On-Reset = 5XXX(X5) Hex)

The gain calibration registers are 16-bit registers on the AD7708 and 24-bit registers on the AD7718. These registers are configured

at power-on with factory-calculated internal full-scale calibration coefficients. There are five full-scale registers available, one for each

of the fully differential input channels. Calibration register pairs are shared when operating in pseudo-differential input mode. Every

device will have different default coefficients. However, these bytes will be automatically overwritten if an internal or system full-scale

calibration is initiated by the user via MD2–MD0 bits in the MODE register. The channel bits, in association with the communication

register address, allow access to the data contained in the GN0 register. This is a read/write register. The calibration registers can

only be written to if the ADC is inactive (MD bits in the mode register = 000 or 001). Reading of the calibration registers does not

clear the RDY bit. A calibration (self or system) is required when operating with chop mode disabled.

ID Register (ID): (A3, A2, A1, A0 = 1, 1, 1, 1; Power-On-Reset = 4X Hex (AD7718) and 5X Hex (AD7708)

This register is a read only 8-bit register. The contents are used to determine the die revision of the silicon. Table XX indicates the

bit locations for the AD7708.

Table XX. ID Register Bit Designation

User Nonprogrammable Test Registers

The AD7708 and AD7718 contain two test registers. The bits in these test registers control the test modes of these ADCs which are

used for the testing of the device. The user is advised not to change the contents of these registers.

ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0

0 1 0 0/1 X X X X

REV. 0

–32–

AD7708/AD7718

Configuring the AD7708/AD7718

All user-accessible registers on the AD7708 and AD7718 are

accessed via the serial interface. Communication with any of

these registers is initiated by first writing to the Communica-

tions Register. Figures 16, 17, and 18 show flow diagrams for

initializing the ADC, a sequence for calibrating the ADC chan-

nels, and a routine that cycles through and reads all channels.

Figure 16 shows a flowchart detailing necessary programming

steps required to initialize the ADC. The following are the general

programming steps required:

1. Configure and initialize the microcontroller or microprocessor

serial port.

2. Initialize the AD7708/AD7718 by configuring the following

registers:

a. IOCON to configure the digital I/O port.

b. FILTER to configure the update rate for each channel.

c. ADCCON to select the active input channel, select

the analog input range, and select unipolar or bipolar

operation.

d. MODE to configure the operating mode. The mode

unbuffered operation of the AINCOM input, 8-/10-

channel mode of operation and reference select along

with the selection of conversion, calibration or idle

modes of operation.

All operations consist of a write to the communications register

to specify the next operation as a write to a specified register.

Data is then written to the specified register. When each sequence

is complete, the ADC defaults to waiting for another write to

the communications register to specify the next operation.

WRITE TO COMMUNICATIONS REGISTER SETTING UP

NEXT OPERATION TO BE A WRITE TO THE MODE

OPERATION

WRITE TO COMMUNICATIONS REGISTER SETTING UP

NEXT OPERATION TO BE A WRITE TO THE ADC

CONTROL REGISTER. CONFIGURE ADCCON

WRITE TO COMMUNICATIONS REGISTER SETTING UP

NEXT OPERATION TO BE A WRITE TO THE FILTER

UPDATE RATE

WRITE TO COMMUNICATIONS REGISTER SELECTING

NEXT OPERATION TO BE A WRITE TO THE IOCON

POWER-ON/RESET FOR AD7708/AD7718

CONFIGURE AND INITIALIZE ␮C/␮P SERIAL PORT

START

Figure 16. Initializing AD7708/AD7718

END

CAL

ANOTHER

CHANNEL

WRITE TO MODE REGISTER SELECTING

FULL-SCALE CALIBRATION

WRITE TO MODE REGISTER SELECTING

ZERO-SCALE CALIBRATION

WRITE TO ADCCON SELECTING CHANNEL AND CONFIGURING

INPUT RANGE AND UNIPOLAR/BIPOLAR MODE

CALIBRATION ROUTINE

MD BITS

= 001?

YES

MD BITS

= 001?

YES

Figure 17. Calibrating the AD7708/AD7718

Figure 17 shows a flowchart detailing necessary programming

steps required when calibrating the AD7708/AD7718. The

AD7708/AD7718 have dedicated calibration register pairs for

each of the fully-differential input channels. Having a dedicated

part of the initialization and the ADC picks up the relevant

coefficients for each channel during normal operation. When

operating is pseudo-differential mode channels share calibration

ured with the same operating conditions to avoid having to

calibrate each time a channel is switched, especially with chop

mode disabled. The AD7708/AD7718 are factory-calibrated

with chop mode enabled and, therefore, if the ADC is operated

at the same conditions as the factory-calibration field calibra-

tions will not be required. Extremely low offset error and offset

and gain drift errors are a by product of the chopping scheme.

When operating with chop mode disabled, the user can achieve

faster throughput times. An offset calibration is required with

chop disabled when a gain or temperature change occurs. The

following are the general programming steps required when

calibrating a channel on the AD7708/AD7718.

REV. 0

AD7708/AD7718

–33–

1. Write to the ADCCON register to select the channel to be

calibrated, its input range, and operation in unipolar or

bipolar mode.

2. Write to the mode register selecting chop or nonchop mode

of operation, select the reference, buffered/unbuffered opera-

tion on the AINCOM, and select zero-scale offset calibration.

Zero-scale calibration can be either self-calibration, where

the ADC determines the zero point internal to the ADC, or a

system calibration where the user must supply the zero-scale

voltage to the input for the duration of the calibration.

3. The calibration is initiated following the write to the mode

tion is complete. This can be performed in two ways, by

polling the RDY pin or flag or by monitoring the MD2,

MD1, MD0 bits in the mode register. These bits are reset to

0, 0, 1 when the calibration is complete. The flowchart uses

polling of the mode bits in the mode register to determine

when the calibration is complete.

4. The next step is to perform the full-scale calibration. Full-scale

calibration can be a self-calibration or system calibration.

Using system calibration the user must supply the full-scale

signal to the analog inputs for the duration of the calibration.

Again the MD2, MD1, MD0 bits in the mode register are

monitored to determine when the calibration is complete.

Figure 18 shows a flowchart detailing the necessary program-

ming steps required to cycle through and read data results from

all channels in a multiplexed application. This flowchart assumes

that all channels have been previously calibrated. The following

are the general programming steps required when reading all

channels in a multiplexed application.

1. The AD7708/AD7718 is put into continuous conversion

mode. In this mode the part continually converts on the

specified channel and the RDY line indicates when valid

data is available to be read from the data register.

2. The ADCCON register is written to select the channel

for conversion, its input range and operation is unipolar/

bipolar mode.

3. In this flowchart hardware polling of the RDY line is per-

formed to determine when it is valid to read data from the

converter. When RDY is low, valid data is available in the

data register. The RDY line is set high on a channel change

and will not go low until a new valid data word is available.

Alternatively, the RDY bit in the status register can be polled

in software to determine when to read data from the converter.

4. When the data is read, increment the channel address pointer

to select the next channel, poll the RDY pin, or RDY bit in

the status register, and again read the data. Continue until all

channels have been read.

POLL RDY PIN

WRITE TO ADCCON SELECTING CHANNEL N

AND ITS OPERATING RANGE

END

WRITE TO COMMUNICATIONS REGISTER SETTING UP

NEXT OPERATION TO BE A READ OF DATA REGISTER

AND THEN READ DATA RESULT

WRITE TO MODE REGISTER SELECTING

CONTINUOUS CONVERSION MODE

CYCLE THROUGH AND

READ ALL CHANNELS

RDY

LOW?

YES

ALL

CHANNELS

READ

YES

INCREMENT CHANNEL ADDRESS (N = N+1)

Figure 18. Multichannel Read Operation

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30 P31-P33 P34-P36 P37-P39 P40-P42 P43-P44

AD7708BRUZ-REEL

Mfr. #:

Buy AD7708BRUZ-REEL

Manufacturer:

Analog Devices Inc.

Description:

Analog to Digital Converters - ADC 16-Bit 8/10-Ch Low Vtg Low Pwr

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AD7708BRUZ-REEL

AD7708BRUZ-REEL

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