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SC68C752BIBS,151

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48
SC68C752B_4 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 20 January 2010 37 of 48
NXP Semiconductors
SC68C752B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
(1) CS timing during a write cycle. See Figure 15.
(2) CS
timing during a read cycle. See Figure 14.
Fig 16. Modem input/output timing
t
d7
change of state
t
d8
t
d8
t
d9
002aab08
9
t
d8
change of state
change of state change of state
active
active active active
active active active
change of state
RTSA, RTSB
DTRA, DTRB
CS (write)
(1)
CDA, CDB
CTSA, CTSB
DSRA, DSRB
IRQ
CS (read)
(2)
RIA, RIB
Fig 17. External clock timing
external clock
002aac35
7
t
w(clk)
t
WL
t
WH
f
XTAL1
1
t
wclk()
---------------
=
SC68C752B_4 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 20 January 2010 38 of 48
NXP Semiconductors
SC68C752B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Fig 18. Receive timing
D0 D1 D2 D3 D4 D5 D6 D7
active
active
16 baud rate clock
002aab09
0
t
d11
next
data
Start
bit
Stop
bit
parity
bit
Start
bit
t
d10
RXA, RXB
IRQ
CS (read)
data bits (0 to 7)
5 data bits
6 data bits
7 data bits
Fig 19. Receive ready timing in non-FIFO mode
D0 D1 D2 D3 D4 D5 D6 D7
002aab091
next
data
Start
bit
Stop
bit
parity
bit
t
d15
RXA, RXB
RXRDYA,
RXRDYB
CS (read)
active data
ready
Start
bit
data bits (0 to 7)
active
t
d16
SC68C752B_4 © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 04 — 20 January 2010 39 of 48
NXP Semiconductors
SC68C752B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Fig 20. Receive ready timing in FIFO mode
D0 D1 D2 D3 D4 D5 D6 D7
002aab092
first byte that
reaches the
trigger level
Stop
bit
parity
bit
t
d15
RXA, RXB
RXRDYA,
RXRDYB
CS (read)
active data
ready
Start
bit
data bits (0 to 7)
active
t
d16
Fig 21. Transmit timing
D0 D1 D2 D3 D4 D5 D6 D7
active
transmitter ready
active
16 baud rate clock
002aab093
t
d14
Start
bit
t
d12
TXA, TXB
IRQ
CS (write)
data bits (0 to 7)
active
t
d13
5 data bits
6 data bits
7 data bits
parity
bit
Stop
bit
next
data
Start
bit
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48

SC68C752BIBS,151

Mfr. #:
Buy SC68C752BIBS,151
Manufacturer:
NXP Semiconductors
Description:
IC UART DUAL W/FIFO 32-HVQFN
Lifecycle:
New from this manufacturer.
Delivery:
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