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SC68C752BIBS,151
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P36
P37-P39
P40-P42
P43-P45
P46-P48
SC68C752B_4
© NXP B.V
. 2010. All rights r
eserved.
Product data sheet
Rev
. 04 —
20 January 2010
40 of 48
NXP Semiconductors
SC68C752B
5 V
, 3.3 V and 2.5
V dual UART
, 5 Mbit/s (max
.), with 64-
byte FIFO
s
Fig 22.
T
ransmit ready timing in non-F
IFO mode
D0
D1
D2
D3
D4
D5
D6
D7
002aab09
4
Star
t
bit
t
d17
TXA,
TXB
TXRD
Y
A,
TXRD
YB
CS (write)
data bits (0 to 7)
active
D0 to D7
byte #1
t
d18
transmitter
not ready
active
transmitter ready
parity
bit
Stop
bit
next
data
Star
t
bit
Fig 23.
T
ransmit ready timing in FI
FO mode
D0
D1
D2
D3
D4
D5
D6
D7
002aab37
7
stop
bit
parity
bit
t
d17
TXA,
TXB
CS (write)
D0 to D7
star
t
bit
data bits (0 to 7)
byte #64
TXRD
Y
A,
TXRD
YB
t
d18
trigger
lead
active
5 data bits
6 data bits
7 data bits
SC68C752B_4
© NXP B.V
. 2010. All rights r
eserved.
Product data sheet
Rev
. 04 —
20 January 2010
41 of 48
NXP Semiconductors
SC68C752B
5 V
, 3.3 V and 2.5
V dual UART
, 5 Mbit/s (max
.), with 64-
byte FIFO
s
12.
Package outline
Fig 24.
Package ou
tline SOT313-2 (LQFP48)
UNIT
A
max.
A
1
A
2
A
3
b
p
cE
(1)
eH
E
LL
p
Z
y
w
v
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
1.6
0.20
0.05
1.45
1.35
0.25
0.27
0.17
0.18
0.12
7.1
6.9
0.5
9.15
8.85
0.95
0.55
7
0
o
o
0.12
0.1
0.2
1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
0.75
0.45
SOT313-2
MS-026
136E05
00-01-19
03-02-25
D
(1)
(1)
(1)
7.1
6.9
H
D
9.15
8.85
E
Z
0.95
0.55
D
b
p
e
E
B
12
D
H
b
p
E
H
v
M
B
D
Z
D
A
Z
E
e
v
M
A
1
48
37
36
25
24
13
θ
A
1
A
L
p
detail X
L
(A )
3
A
2
X
y
c
w
M
w
M
0
2.5
5 mm
scale
pin 1 index
L
QFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
SOT313
-2
SC68C752B_4
© NXP B.V
. 2010. All rights r
eserved.
Product data sheet
Rev
. 04 —
20 January 2010
42 of 48
NXP Semiconductors
SC68C752B
5 V
, 3.3 V and 2.5
V dual UART
, 5 Mbit/s (max
.), with 64-
byte FIFO
s
Fig 25.
Package
outline SOT617-1 (HVQF
N32)
0.5
1
A
1
E
h
b
UNIT
y
e
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
5.1
4.9
D
h
3.25
2.95
y
1
5.1
4.9
3.25
2.95
e
1
3.5
e
2
3.5
0.30
0.18
0.05
0.00
0.05
0.1
DIMENSIONS (mm are the original dimensions)
SOT617-1
MO-220
- - -
- - -
0.5
0.3
L
0.1
v
0.05
w
0
2.5
5 mm
scale
SOT617
-1
H
VQFN32: plastic thermal enhanced very thin quad flat package; no leads;
3
2 terminals; body 5 x 5 x 0.85 mm
A
(1)
max.
A
A
1
c
detail X
y
y
1
C
e
L
E
h
D
h
e
e
1
b
91
6
32
25
24
17
8
1
X
D
E
C
B
A
e
2
terminal 1
index area
terminal 1
index area
01-08-08
02-10-18
1/2
e
1/2
e
A
C
C
B
v
M
w
M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P36
P37-P39
P40-P42
P43-P45
P46-P48
SC68C752BIBS,151
Mfr. #:
Buy SC68C752BIBS,151
Manufacturer:
NXP Semiconductors
Description:
IC UART DUAL W/FIFO 32-HVQFN
Lifecycle:
New from this manufacturer.
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