AD7705/AD7706
Rev. C | Page 13 of 44
OUTPUT NOISE (3 V OPERATION)
Table 7 shows the AD7705/AD7706 output rms noise for the
selectable notch and −3 dB frequencies for the parts, as selected
by FS0 and FS1 of the clock register. The numbers given are for
the bipolar input ranges with a V
REF
of 1.225 V and a V
DD
= 3 V.
These numbers are typical and are generated at an analog input
voltage of 0 V with the parts used in either buffered or unbuffered
mode.
Table 8 shows the output peak-to-peak noise for the
selectable notch and −3 dB frequencies for the parts.
Note that these numbers represent the resolution for which
there is no code flicker. They are not calculated based on rms
noise, but on peak-to-peak noise. The numbers given are for
bipolar input ranges with a V
REF
of 1.225 V for either buffered or
unbuffered mode. These numbers are typical and are rounded
to the nearest LSB. The numbers apply for the CLKDIV bit of
the clock register set to 0.
Table 7. Output RMS Noise vs. Gain and Output Update Rate @ 3 V
Typical Output RMS Noise in μV Filter First
Notch and
O/P Data Rate
−3 dB
Frequency
Gain of 1 Gain of 2 Gain of 4 Gain of 8 Gain of 16 Gain of 32 Gain of 64 Gain of 128
MCLK IN = 2.4576 MHz
50 Hz 13.1 Hz 3.8 2.4 1.5 1.3 1.1 1.0 0.9 0.9
60 Hz 15.72 Hz 5.1 2.9 1.7 1.5 1.2 1.0 0.9 0.9
250 Hz 65.5 Hz 50 25 14 9.9 5.1 2.6 2.3 2.0
500 Hz 131 Hz 270 135 65 41 22 9.7 5.1 3.3
MCLK IN = 1 MHz
20 Hz 5.24 Hz 3.8 2.4 1.5 1.3 1.1 1.0 0.9 0.9
25 Hz 6.55 Hz 5.1 2.9 1.7 1.5 1.2 1.0 0.9 0.9
100 Hz 26.2 Hz 50 25 14 9.9 5.1 2.6 2.3 2.0
200 Hz 52.4 Hz 270 135 65 41 22 9.7 5.1 3.3
Table 8. Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 3 V
Typical Peak-to-Peak Resolution in Bits
Filter First
Notch and
O/P Data Rate
−3 dB
Frequency Gain of 1 Gain of 2 Gain of 4 Gain of 8 Gain of 16 Gain of 32 Gain of 64 Gain of 128
MCLK IN = 2.4576 MHz
50 Hz 13.1 Hz 16 16 15 15 14 13 13 12
60 Hz 15.72 Hz 16 16 15 14 14 13 13 12
250 Hz 65.5 Hz 13 13 13 13 12 12 11 11
500 Hz 131 Hz 10 10 10 10 10 10 10 10
MCLK IN = 1 MHz
20 Hz 5.24 Hz 16 16 15 15 14 13 13 12
25 Hz 6.55 Hz 16 16 15 14 14 13 13 12
100 Hz 26.2 Hz 13 13 13 13 12 12 11 11
200 Hz 52.4 Hz 10 10 10 10 10 10 10 10
AD7705/AD7706
Rev. C | Page 14 of 44
TYPICAL PERFORMANCE CHARACTERISTICS
READING NUMBER
32763
0 100
CODE READ
32764
32765
32766
32767
32768
32769
32770
32771
200 300 400 500 600 700 800 900 1000
V
DD
= 5V
V
REF
= 2.5V
GAIN = +128
50Hz UPDATE RATE
T
A
= 25°C
RMS NOISE = 600nV
01166-005
Figure 5. Noise @ Gain = +128 With 50 Hz Update Rate
FREQUENCY (MHz)
0.4
I
DD
(mA)
V
DD
= 3V
T
A
= 25°C
1.2
1.0
0.8
0.6
0.4
0.2
0
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
BUFFERED MODE, GAIN = +128
UNBUFFERED MODE, GAIN = +1
UNBUFFERED MODE, GAIN = +128
BUFFERED MODE, GAIN = +1
01166-006
Figure 6. I
DD
vs. MCLK IN Frequency @ 3 V
GAIN
1
I
DD
(
mA)
1.0
0.8
0.6
0.4
0.2
0
0.1
0.3
0.5
0.7
0.9
2 4 8 16 32 64 128
BUFFERED MODE
f
CLK
= 5MHz,
CLKDIV = 1
UNBUFFERED MODE
f
CLK
= 1MHz,
CLKDIV = 0
V
DD
= 3V
EXTERNAL MCLK
CLKDIS = 1
T
A
= 25°C
BUFFERED MODE
f
CLK
= 2.4576MHz, CLKDIV = 0
UNBUFFERED MODE
f
CLK
= 5MHz, CLKDIV = 1
UNBUFFERED MODE
f
CLK
= 2.84MHz, CLKDIV = 0
BUFFERED MODE
f
CLK
= 1MHz, CLKDIV = 0
01166-007
Figure 7. I
DD
vs. Gain and Clock Frequency @ 3 V
CODE
32764
OCCURRENCE
400
0
32765 32766 32767 32768 32769 32770
300
200
100
01166-008
Figure 8. Histogram of Data in
Figure 5
FREQUENCY (MHz)
0.4
I
DD
(mA)
V
DD
= 5V
T
A
= +25°C
1.2
1.0
0.8
0.6
0.4
0.2
0
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
BUFFERED MODE, GAIN = +128
UNBUFFERED MODE, GAIN = +1
UNBUFFERED MODE, GAIN = +128
BUFFERED MODE, GAIN = +1
01166-009
Figure 9. I
DD
vs. MCLK IN Frequency @ 5 V
GAIN
1
I
DD
(mA)
V
DD
= 5V
EXTERNAL MCLK
CLKDIS = 1
T
A
= 25°C
1.2
0.8
0.6
0.4
0.2
0
1.0
2 4 8 16 32 64 128
BUFFERED MODE
f
CLK
= 5MHz,
CLKDIV = 1
BUFFERED MODE
f
CLK
= 1MHz, CLKDIV = 0
BUFFERED MODE
f
CLK
= 2.4576MHz, CLKDIV = 0
UNBUFFERED MODE
f
CLK
= 2.4576MHz, CLKDIV = 0
UNBUFFERED MODE
f
CLK
= 1MHz,
CLKDIV = 0
UNBUFFERED MODE
f
CLK
= 5MHz, CLKDIV = 1
01166-010
Figure 10. I
DD
vs. Gain and Clock Frequency @ 5 V
AD7705/AD7706
Rev. C | Page 15 of 44
CH1 5.00V CH2 2.00V
2
2
1
V
DD
OSCILLATOR = 4.9152MHz
OSCILLATOR = 2.4576MHz
5ms/DIV
01166-011
TEK STOP: SINGLE SEQ 50.0kS/s
Figure 11. Crystal Oscillator Power-Up Time
TEMPERATURE (
°
C)
–40
STANDBY CURRENT (μA)
0
4
8
16
20
12
–30 20 –10 0 10 20 30 40 50 60 70 80
V
DD
= 5V
V
DD
= 3V
MCLK IN = 0V OR V
DD
01166-012
Figure 12. Standby Current vs. Temperature

AD7706BRZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 3V/5V 1mW 3-Ch Pseudo Diff 16-Bit
Lifecycle:
New from this manufacturer.
Delivery:
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