TDA8007BHL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9.1 — 18 June 2012 19 of 51
NXP Semiconductors
TDA8007BHL
Multiprotocol IC card interface
2PR1 card 1 present. Bit PR1 = 1 when card 1 is present.
1INTAUXauxiliary interrupt. Bit INTAUX is set when pin INTAUX = high and it is
reset when pin INTAUX = low.
0TBE/RBFtransmit buffer empty/receive buffer full.
Bit TBE/RBF = 1 when:
- changing from reception mode to transmission mode
- the reception FIFO is full.
- a character has been transmitted by the UART
Bit TBE/RBF = 0 after power-on or after one of the following:
- when bit RIU is reset
- when a character has been written to register UTR
- when at least one character has been read in the FIFO
- when changing from transmission mode to reception mode.
Table 16. Description of MSR bits
…continued
Bit Symbol Description
Fig 10. Minimum time between two read operations in register URR - non-multiplexed bus
I/O
bit RBF
bit FE
001aam014
INT
CS
bit CRED
RD
t
SB(FE)
t
SB(RBF)
t
RD(URR)
t
RD(URR)
t
W(RD)
