TDA8007BHL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9.1 — 18 June 2012 6 of 51
NXP Semiconductors
TDA8007BHL
Multiprotocol IC card interface
C82 12 auxiliary I/O for ISO C8 contact (synchronous cards,
for instance) for card 2
PRES2 13 card 2 presence contact input (active high)
C42 14 auxiliary I/O for ISO C4 contact (synchronous cards,
for instance) for card 2
CGND2 15 ground for card 2; must be connected to GND
CLK2 16 clock output to card 2 (ISO C3 contact)
V
CC2
17 card 2 supply output voltage (ISO C1 contact)
RST2 18 card 2 reset output (ISO C2 contact)
GND 19 ground
V
UP
20 connection for the step-up converter capacitor;
connect a low ESR capacitor of 220 nF to AGND
SAP 21 contact 1 for the step-up converter; connect a low
ESR capacitor of 220 nF between pins SAP
and SAM
SBP 22 contact 3 for the step-up converter; connect a low
ESR capacitor of 220 nF between pins SBP
and SBM
V
DDA
23 positive analog supply voltage for the step-up
converter; may be higher than V
DD
; decouple with a
good quality capacitor to GND
SBM 24 contact 4 for the step-up converter; connect a low
ESR capacitor of 220 nF between pins SBP
and SBM
AGND 25 analog ground for the step-up converter
SAM 26 contact 2 for the step-up converter; connect a low
ESR capacitor of 220 nF between pins SAP
and SAM
V
DD
27 positive supply voltage; decouple with a good quality
capacitor to GND
D0 to D7 28, 29, 30, 31, 32, 33,
34, 35
input/output of data 0-7;
TDA8007BHL/C3 in case of mulitplexed
configuration: address 0-7
RD
36 read or write selection input; high for read, low for
write
WR
37 enable pin; same behavior as CS\ (active low)
CS
38 chip select input (active low)
ALE 39 TDA8007BHL/C4: Not connected;
TDA8007BHL/C3: address latch enable input in
case of multiplexed configuration, connect to V
DD
in
non-multiplexed configuration
INT
40 NMOS interrupt output (active low)
INTAUX 41 auxiliary interrupt input
AD3 42 register selection address 3 input
AD2 43 register selection address 2 input
AD1 44 register selection address 1 input
Table 3. Pin description
…continued
Symbol Pin Description
