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TDA8007BHL/C4,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51
TDA8007BHL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9.1 — 18 June 2012 37 of 51
NXP Semiconductors
TDA8007BHL
Multiprotocol IC card interface
t
r
rise time C
L
=30pF - - 0.1 µs
t
f
fall time C
L
=30pF - - 0.1 µs
Clock output to the cards: pins CLK1 and CLK2
V
o(inactive)
output voltage in inactive mode no load 0 - 0.1 V
I
o(inactive)
=1mA 0 - 0.3 V
I
o(inactive)
output current in inactive mode V
o
=0V 0 - 1mA
V
OL
low-level output voltage I
OL
= 200 µA 0 - 0.3 V
V
OH
high-level output voltage I
OH
= -200µA V
CC
0.5 - V
CC
V
t
r
rise time C
L
=30pF - - 8 ns
t
f
fall time C
L
=30pF - - 8 ns
f
CLK
clock frequency idle configuration (1 MHz) 1 - 1.85 MHz
operational 0 - 10 MHz
duty factor C
L
=30pF 45 - 55 %
SR slew rate (rise and fall) C
L
=30pF 0.2 - - V/ns
Card supply output voltage: pins V
CC1
and V
CC2
[1]
V
o(inactive)
output voltage in inactive mode no load 0 - 0.1 V
I
o(inactive)
=1mA 0 - 0.3 V
I
o(inactive)
output current in inactive mode V
o
=0V - - - 1 mA
V
CC
output voltage in active mode 5 V card; I
CC
<65mA 4.75 5 5.25 V
3 V card; I
CC
<50mA 2.78 3 3.22 V
1.8 V card; I
CC
< 30 mA 1.65 1.8 1.95 V
5 V card; current pulses of
40 nC with I < 200 mA,
t < 400 ns and f < 20 MHz
4.6 - 5.4 V
3 V card; current pulses of
24 nC with I < 200 mA,
t < 400 ns and f < 20 MHz
2.75 - 3.25 V
1.8 V card; current pulses of
12 nC with I < 200 mA,
t < 400 ns and f < 20 MHz
1.62 - 1.98 V
I
CC
output current 5 V card; V
CC
=0to5V - - - 65 mA
3 V card; V
CC
=0to3V - - - 50 mA
1.8 V card; V
CC
= 0 to 1.8 V - - - 30 mA
I
CC1
+I
CC
2
sum of both output currents - - - 80 mA
SR slew rate up or down; maximum
capacitance of 300 nF
0.05 0.16 0.22 V/µs
Data lines: pins I/O1 and I/O2
[2]
R
pu
internal pull-up resistance between pin I/O and V
CC
11 14 17 k
V
o(inactive)
output voltage in inactive mode no load 0 - 0.1 V
I
o(inactive)
=1mA - - 0.3 V
I
o(inactive)
output current in inactive mode V
o
=0V - - - 1 mA
Table 35. Characteristics …continued
V
DD
=3.3V; V
DDA
=3.3V; T
amb
= 25 °C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
TDA8007BHL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9.1 — 18 June 2012 38 of 51
NXP Semiconductors
TDA8007BHL
Multiprotocol IC card interface
Configured as output
V
OL
low-level output voltage I
OL
=1mA 0 - 0.3 V
V
OH
high-level output voltage I
OH
< 20 µA 0.8V
CC
-V
CC
+0.25 V
I
OH
< 40 µA for 5 V and 3 V
cards
0.75V
CC
-V
CC
+0.25 V
t
o(r)
, t
o(f)
output transition time (rise and fall
time)
C
L
< 30 pF - - 0.1 µs
Configured as input
V
IL
low-level input voltage 0.3 - +0.8 V
V
IH
high-level input voltage 1.5 - V
CC
V
I
IL
low-level input current V
IL
= 0 V - - 600 µA
I
LIH
high-level input leakage current V
IH
=V
CC
--20µA
t
i(r)
, t
i(f)
input transition time (rise and fall time) C
L
<30pF - - 1.2 µs
Auxiliary cards contacts: pins C41, C81, C42 and C82
[3]
V
o(inactive)
output voltage in inactive mode no load 0 - 0.1 V
I
o(inactive)
=1mA - - 0.3 V
I
o(inactive)
output current in inactive mode V
o
=0V - - -1 mA
t
W(pu)
active pull-up pulse width - 200 - ns
R
int(pu)
internal pull-up resistance between pins C4x or C8x and
V
CC
81012k
f
max
maximum frequency on card contact pins - - 1 MHz
Configured as output
V
OL
low-level output voltage I
OL
=1mA 0 - 0.3 V
V
OH
high-level output voltage I
OH
< -20µA 0.8V
CC
-V
CC
+0.25 V
I
OH
< -40µA for 5 and 3 V
cards
0.75V
CC
-V
CC
+0.25 V
t
o(r)
, t
o(f)
output transition time (rise and fall
time)
C
L
=30pF - - 0.1 µs
Configured as input
V
IL
low-level input voltage - - +0.8 V
V
IH
high-level input voltage 1.5 - V
CC
V
I
IL
low-level input current V
IL
= 0 V - - 600 µA
I
LIH
high-level input leakage current V
IH
=V
CC
--20µA
t
i(r)
, t
i(f)
input transition time (rise and fall time) C
L
=30pF - - 1.2 µs
Timing
t
act
activation sequence duration see Figure 18 --130µs
t
de
deactivation sequence duration see Figure 19 --150µs
Protection and limitation
I
CC(sd)
shutdown and limitation current at
pin V
CC
- 100 - mA
I
I/O(lim)
limitation current on pin I/O 15 - +15 mA
I
CLK(lim)
limitation current on pin CLK 70 - +70 mA
Table 35. Characteristics
…continued
V
DD
=3.3V; V
DDA
=3.3V; T
amb
= 25 °C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
TDA8007BHL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9.1 — 18 June 2012 39 of 51
NXP Semiconductors
TDA8007BHL
Multiprotocol IC card interface
I
RST(sd)
shutdown current on pin RST - - 20 - mA
I
RST(lim)
limitation current on pin RST 20 - +20 mA
T
sd
shutdown temperature - 150 - °C
Card presence inputs: pins PRES1 and PRES2
V
IL
low-level input voltage - - 0.3V
DD
V
V
IH
high-level input voltage 0.7V
DD
-- V
I
OL
low-level output leakage current V
OL
=0.4V - - 10 µA
I
OH
high-level output leakage current V
OH
= 2.5 V - - 55 µA
Bidirectional data bus: pins D0 to D7
Configured as input
V
IL
low-level input voltage - - 0.3V
DD
V
V
IH
high-level input voltage 0.7V
DD
-- V
I
LIL
low-level input leakage current 20 - +20 µA
I
LIH
high-level input leakage current 20 - +20 µA
C
L
load capacitance - - 10 pF
Configured as output
V
OL
low-level output voltage I
OL
=5mA - - 0.2V
DD
V
V
OH
high-level output voltage I
OH
= 5 mA 0.8V
DD
-- V
t
o(r)
, t
o(f)
output transition time (rise and fall
time)
C
L
=50pF - - 25 ns
Logic inputs: pins AD0, AD1, AD2, AD3, INTAUX, CS
, RD and WR
V
IL
low-level input voltage 0.3 - 0.3V
DD
V
V
IH
high-level input voltage 0.7V
DD
-V
DD
+0.3 V
I
LIL
low-level input leakage current 20 - +20 µA
I
LIH
high-level input leakage current 20 - +20 µA
C
L
load capacitance - 10 pF
Logic inputs: pins ALE: only applicable for TDA8007BHL/C3
V
IL
low-level input voltage 0.3 - 0.3V
DD
V
V
IH
high-level input voltage 0.7V
DD
-V
DD
+0.3 V
I
LIL
low-level input leakage current 20 - +20 µA
I
LIH
high-level input leakage current 20 - +20 µA
C
L
load capacitance - 10 pF
Auxiliary input and output: pin I/OAUX
[4]
R
int(pu)
internal pull-up resistance between pin I/OAUX and V
DD
11 - 17 k
f
max
maximum frequency on pin I/OAUX - - 1 MHz
Configured as input
V
IL
low-level input voltage 0.3 - 0.3V
DD
V
V
IH
high-level input voltage 0.7V
DD
-V
DD
+0.3 V
I
LIH
high-level input leakage current 20 - +20 µA
I
IL
low-level input current V
IL
=0V - - 600 µA
Table 35. Characteristics
…continued
V
DD
=3.3V; V
DDA
=3.3V; T
amb
= 25 °C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51

TDA8007BHL/C4,118

Mfr. #:
Buy TDA8007BHL/C4,118
Manufacturer:
NXP Semiconductors
Description:
I/O Controller Interface IC 12bit 2-I/Os 5V
Lifecycle:
New from this manufacturer.
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