2000 Jan 04 43
Philips Semiconductors Product specification
Stand-alone CAN controller SJA1000
Table 35 RX identifier 1 (SFF); CAN address 17; note 1
Note
1. ID.X means identifier bit X.
Table 36 RX identifier 2 (SFF); CAN address 18; note 1
Notes
1. ID.X means identifier bit X.
2. Remote transmission request.
Table 37 RX frame information (EFF); CAN address 16
Notes
1. Frame format.
2. Remote transmission request.
3. Data length code bit.
Table 38 RX identifier 1 (EFF); CAN address 17; note 1
Note
1. ID.X means identifier bit X.
Table 39 RX identifier 2 (EFF); CAN address 18; note 1
Note
1. ID.X means identifier bit X.
Table 40 RX identifier 3 (EFF); CAN address 19; note 1
Note
1. ID.X means identifier bit X.
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
ID.28 ID.27 ID.26 ID.25 ID.24 ID.23 ID.22 ID.21
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
ID.20 ID.19 ID.18 RTR
(2)
0000
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
FF
(1)
RTR
(2)
0 0 DLC.3
(3)
DLC.2
(3)
DLC.1
(3)
DLC.0
(3)
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
ID.28 ID.27 ID.26 ID.25 ID.24 ID.23 ID.22 ID.21
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
ID.20 ID.19 ID.18 ID.17 ID.16 ID.15 ID.14 ID.13
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
ID.12 ID.11 ID.10 ID.9 ID.8 ID.7 ID.6 ID.5
2000 Jan 04 44
Philips Semiconductors Product specification
Stand-alone CAN controller SJA1000
Table 41 RX identifier 4 (EFF); can address 20; note 1
Notes
1. ID.X means identifier bit X.
2. Remote transmission request.
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
ID.4 ID.3 ID.2 ID.1 ID.0 RTR
(2)
00
Remark: the received data length code located in the
frame information byte represents the real sent data length
code, which may be greater than 8 (depends on sender).
Nevertheless the maximum number of received data bytes
is 8. This should be taken into account by reading a
message from the receive buffer.
As described in Fig.8 the RXFIFO has space for
64 message bytes in total. It depends on the data length
how many messages can fit in it at one time. If there is not
enough space for a new message within the RXFIFO, the
CAN controller generates a data overrun condition the
moment this message becomes valid and the acceptance
test was positive. A message which is partly written into
the RXFIFO, when the data overrun situation occurs, is
deleted. This situation is indicated to the CPU via the
status register and the data overrun interrupt, if enabled.
6.4.15 ACCEPTANCE FILTER
With the help of the acceptance filter the CAN controller is
able to allow passing of received messages to the RXFIFO
only when the identifier bits of the received message are
equal to the predefined ones within the acceptance filter
registers.
The acceptance filter is defined by the Acceptance Code
Registers (ACRn) and the Acceptance Mask Registers
(AMRn). The bit patterns of messages to be received are
defined within the acceptance code registers.
The corresponding acceptance mask registers allow to
define certain bit positions to be ‘don’t care’.
Two different filter modes are selectable within the mode
register (MOD.3, AFM; see Section 6.4.3):
Single filter mode (bit AFM is logic 1)
Dual filter mode (bit AFM is logic 0).
6.4.15.1 Single filter configuration
In this filter configuration one long filter (4-bytes) could be
defined. The bit correspondences between the filter bytes
and the message bytes depend on the currently received
frame format.
Standard frame: if a standard frame format message is
received, the complete identifier including the RTR bit and
the first two data bytes are used for acceptance filtering.
Messages may also be accepted if there are no data bytes
existing due to a set RTR bit or if there is none or only one
data byte because of the corresponding data length code.
For a successful reception of a message, all single bit
comparisons have to signal acceptance.
Note, that the 4 least significant bits of AMR1 and ACR1
are not used. In order to be compatible with future products
these bits should be programmed to be ‘don’t care’ by
setting AMR1.3, AMR1.2, AMR1.1 and AMR1.0 to logic 1.
2000 Jan 04 45
Philips Semiconductors Product specification
Stand-alone CAN controller SJA1000
Fig.9 Single filter configuration, receiving standard frame messages.
DBX.Y means data byte X, bit Y.
handbook, full pagewidth
MGK624
7
MSB LSB
6543210
CAN ADDRESS 16; ACR0
7
MSB LSB
6543
unused
unused
(1)
210
CAN ADDRESS 17; ACR1
7
MSB LSB
6543210
CAN ADDRESS 18; ACR2
7
MSB LSB
6543210
CAN ADDRESS 19; ACR3
76543210
CAN ADDRESS 20; AMR0
76543210
CAN ADDRESS 21; AMR1
76543210
CAN ADDRESS 22; AMR2
76543210
CAN ADDRESS 23; AMR3
ID.28
ID.27
ID.26
ID.25
ID.24
ID.23
ID.22
ID.21
ID.20
ID.19
ID.18
RTR
DB1.7
DB1.6
DB1.5
DB1.4
DB1.3
DB1.2
DB1.1
DB1.0
DB2.7
DB2.6
DB2.5
DB2.4
DB2.3
DB2.2
DB2.1
DB2.0
&
1
= 1
logic 1 = accepted
logic 0 = not accepted
message bit
acceptance code bit
acceptance mask bit
ACR = Acceptance Code Register
AMR = Acceptance Mask Register
Extended frame: if an extended frame format message is
received, the complete identifier including the RTR bit is
used for acceptance filtering.
For a successful reception of a message, all single bit
comparisons have to signal acceptance.
It should be noted that the 2 least significant bits of AMR3
and ACR3 are not used. In order to be compatible with
future products these bits should be programmed to be
‘don’t care’ by setting AMR3.1 and AMR3.0 to logic 1.

SJA1000T/N1,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
CAN Interface IC STAND ALONE CAN
Lifecycle:
New from this manufacturer.
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