7
SAM9G45 [Summary]
6438IS–ATARM–12-Feb-13
NAND Flash Support
NANDCS NAND Flash Chip Select Output Low VDDIOM1
NANDOE NAND Flash Output Enable Output Low VDDIOM1
NANDWE NAND Flash Write Enable Output Low VDDIOM1
DDR2/SDRAM/LPDDR Controller
SDCK,#SDCK DDR2/SDRAM differential clock Output VDDIOM1
SDCKE DDR2/SDRAM Clock Enable Output High VDDIOM1
SDCS DDR2/SDRAM Controller Chip Select Output Low VDDIOM1
BA0 - BA1 Bank Select Output VDDIOM1
SDWE DDR2/SDRAM Write Enable Output Low VDDIOM1
RAS - CAS Row and Column Signal Output Low VDDIOM1
SDA10 SDRAM Address 10 Line Output VDDIOM1
DQS[0..1] Data Strobe Output VDDIOM1
DQM[0..3] Write Data Mask Output VDDIOM1
High Speed Multimedia Card Interface - HSMCIx
MCIx_CK Multimedia Card Clock I/O
(1)
MCIx_CDA Multimedia Card Slot A Command I/O
(1)
MCIx_DA0 -
MCIx_DA7
Multimedia Card Slot A Data I/O
(1)
Universal Synchronous Asynchronous Receiver Transmitter - USARTx
SCKx USARTx Serial Clock I/O
(1)
TXDx USARTx Transmit Data Output
(1)
RXDx USARTx Receive Data Input
(1)
RTSx USARTx Request To Send Output
(1)
CTSx USARTx Clear To Send Input
(1)
Synchronous Serial Controller - SSCx
TDx SSC Transmit Data Output
(1)
RDx SSC Receive Data Input
(1)
TKx SSC Transmit Clock I/O
(1)
RKx SSC Receive Clock I/O
(1)
TFx SSC Transmit Frame Sync I/O
(1)
RFx SSC Receive Frame Sync I/O
(1)
Table 3-1. Signal Description List (Continued)
Signal Name Function Type
Active
Level
Reference
Voltage Comments
8
SAM9G45 [Summary]
6438IS–ATARM–12-Feb-13
AC97 Controller - AC97C
AC97RX AC97 Receive Signal Input
(1)
AC97TX AC97 Transmit Signal Output
(1)
AC97FS AC97 Frame Synchronization Signal Output
(1)
AC97CK AC97 Clock signal Input
(1)
Time Counter - TCx
TCLKx TC Channel x External Clock Input Input
(1)
TIOAx TC Channel x I/O Line A I/O
(1)
TIOBx TC Channel x I/O Line B I/O
(1)
Pulse Width Modulation Controller - PWM
PWMx Pulse Width Modulation Output Output
(1)
Serial Peripheral Interface - SPIx_
SPIx_MISO Master In Slave Out I/O
(1)
SPIx_MOSI Master Out Slave In I/O
(1)
SPIx_SPCK SPI Serial Clock I/O
(1)
SPIx_NPCS0 SPI Peripheral Chip Select 0 I/O Low
(1)
SPIx_NPCS1-
SPIx_NPCS3
SPI Peripheral Chip Select Output Low
(1)
Two-Wire Interface
TWDx Two-wire Serial Data I/O
(1)
TWCKx Two-wire Serial Clock I/O
(1)
USB Host High Speed Port - UHPHS
HFSDPA USB Host Port A Full Speed Data + Analog VDDUTMII
HFSDMA USB Host Port A Full Speed Data - Analog VDDUTMII
HHSDPA USB Host Port A High Speed Data + Analog VDDUTMII
HHSDMA USB Host Port A High Speed Data - Analog VDDUTMII
HFSDPB USB Host Port B Full Speed Data + Analog VDDUTMII Multiplexed with DFSDP
HFSDMB USB Host Port B Full Speed Data - Analog VDDUTMII Multiplexed with DFSDM
HHSDPB USB Host Port B High Speed Data + Analog VDDUTMII Multiplexed with DHSDP
HHSDMB USB Host Port B High Speed Data - Analog VDDUTMII Multiplexed with DHSDM
USB Device High Speed Port - UDPHS
DFSDM USB Device Full Speed Data - Analog VDDUTMII
DFSDP USB Device Full Speed Data + Analog VDDUTMII
DHSDM USB Device High Speed Data - Analog VDDUTMII
DHSDP USB Device High Speed Data + Analog VDDUTMII
Table 3-1. Signal Description List (Continued)
Signal Name Function Type
Active
Level
Reference
Voltage Comments
9
SAM9G45 [Summary]
6438IS–ATARM–12-Feb-13
Ethernet 10/100
ETXCK Transmit Clock or Reference Clock Input
(1)
MII only, REFCK in RMII
ERXCK Receive Clock Input
(1)
MII only
ETXEN Transmit Enable Output
(1)
ETX0-ETX3 Transmit Data Output
(1)
ETX0-ETX1 only in RMII
ETXER Transmit Coding Error Output
(1)
MII only
ERXDV Receive Data Valid Input
(1)
RXDV in MII, CRSDV in RMII
ERX0-ERX3 Receive Data Input
(1)
ERX0-ERX1 only in RMII
ERXER Receive Error Input
(1)
ECRS Carrier Sense and Data Valid Input
(1)
MII only
ECOL Collision Detect Input
(1)
MII only
EMDC Management Data Clock Output
(1)
EMDIO Management Data Input/Output I/O
(1)
Image Sensor Interface
ISI_D0-ISI_D11 Image Sensor Data Input VDDIOP2
ISI_MCK Image sensor Reference clock output VDDIOP2
ISI_HSYNC Image Sensor Horizontal Synchro input VDDIOP2
ISI_VSYNC Image Sensor Vertical Synchro input VDDIOP2
ISI_PCK Image Sensor Data clock input VDDIOP2
LCD Controller - LCDC
LCDD0 -
LCDD23
LCD Data Bus Output VDDIOP1
LCDVSYNC LCD Vertical Synchronization Output VDDIOP1
LCDHSYNC LCD Horizontal Synchronization Output VDDIOP1
LCDDOTCK LCD Dot Clock Output VDDIOP1
LCDDEN LCD Data Enable Output VDDIOP1
LCDCC LCD Contrast Control Output VDDIOP1
LCDPWR LCD panel Power enable control Output VDDIOP1
LCDMOD LCD Modulation signal Output VDDIOP1
Touch Screen Analog-to-Digital Converter
AD0X
P
Analog input channel 0 or
Touch Screen Top channel
Analog VDDANA Multiplexed with AD0
AD1X
M
Analog input channel 1 or
Touch Screen Bottom channel
Analog VDDANA Multiplexed with AD1
AD2Y
P
Analog input channel 2 or
Touch Screen Right channel
Analog VDDANA Multiplexed with AD2
AD3Y
M
Analog input channel 3 or
Touch Screen Left channel
Analog VDDANA Multiplexed with AD3
Table 3-1. Signal Description List (Continued)
Signal Name Function Type
Active
Level
Reference
Voltage Comments

AT91SAM9G45B-CU-999

Mfr. #:
Manufacturer:
Description:
IC MCU 32BIT 64KB ROM 324TFBGA SAM9G
Lifecycle:
New from this manufacturer.
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