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5M160ZM68I5N

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30
Chapter 3: DC and Switching Characteristics for MAX V Devices 3–13
Timing Model and Specifications
May 2011 Altera Corporation MAX V Device Handbook
t
CLKHL
Minimum clock high or
low time
253 — 339 — 216 — 266 — ps
t
C
Register control delay — 1,356 — 1,741 — 1,114 — 1,372 ps
Table 3–18. LE Internal Timing Microparameters for MAX V Devices (Part 2 of 2)
Symbol Parameter
5M40Z/ 5M80Z/ 5M160Z/
5M240Z/ 5M570Z
5M1270Z/ 5M2210Z
Unit
C4 C5, I5 C4 C5, I5
Min Max Min Max Min Max Min Max
Table 3–19. IOE Internal Timing Microparameters for MAX V Devices
Symbol Parameter
5M40Z/ 5M80Z/ 5M160Z/
5M240Z/ 5M570Z
5M1270Z/ 5M2210Z
Unit
C4 C5, I5 C4 C5, I5
Min Max Min Max Min Max Min Max
t
FASTIO
Data output delay from
adjacent LE to I/O block
— 170 — 428 — 207 — 254 ps
t
IN
I/O input pad and buffer
delay
— 907 — 986 — 920 — 1,132 ps
t
GLOB
(1)
I/O input pad and buffer
delay used as global
signal pin
— 2,261 — 3,322 — 1,974 — 2,430 ps
t
IOE
Internally generated
output enable delay
— 530 — 1,410 — 374 — 460 ps
t
DL
Input routing delay — 318 — 509 — 291 — 358 ps
t
OD
(2)
Output delay buffer and
pad delay
— 1,319 — 1,543 — 1,383 — 1,702 ps
t
XZ
(3)
Output buffer disable
delay
— 1,045 — 1,276 — 982 — 1,209 ps
t
ZX
(4)
Output buffer enable
delay
— 1,160 — 1,353 — 1,303 — 1,604 ps
Notes to Table 3–19:
(1) Delay numbers for t
GLOB
differ for each device density and speed grade. The delay numbers for t
GLOB
, shown in Table 3–19, are based on a 5M240Z
device target.
(2) For more information about delay adders associated with different I/O standards, drive strengths, and slew rates, refer to Table 3–34 on page 3–24
and Table 3–35 on page 3–25.
(3) For more information about t
XZ
delay adders associated with different I/O standards, drive strengths, and slew rates, refer to Table 3–22 on
page 3–15 and Table 3–23 on page 3–15.
(4) For more information about t
ZX
delay adders associated with different I/O standards, drive strengths, and slew rates, refer to Table 3–20 on
page 3–14 and Table 3–21 on page 3–14.
3–14 Chapter 3: DC and Switching Characteristics for MAX V Devices
Timing Model and Specifications
MAX V Device Handbook May 2011 Altera Corporation
Table 3–20 through Ta bl e 3–2 3 list the adder delays for t
ZX
and t
XZ
microparameters
when using an I/O standard other than 3.3-V LVTTL with 16 mA drive strength.
Table 3–20. t
ZX
IOE Microparameter Adders for Fast Slew Rate for MAX V Devices
Standard
5M40Z/ 5M80Z/ 5M160Z/
5M240Z/ 5M570Z
5M1270Z/ 5M2210Z
Unit
C4 C5, I5 C4 C5, I5
Min Max Min Max Min Max Min Max
3.3-V LVTTL
16 mA —0 —0 —0 —0 ps
8 mA — 72 — 74 — 101 — 125 ps
3.3-V LVCMOS
8 mA —0 —0 —0 —0 ps
4 mA — 72 — 74 — 101 — 125 ps
2.5-V LVTTL /
LVCMOS
14 mA — 126 — 127 — 155 — 191 ps
7 mA — 196 — 197 — 545 — 671 ps
1.8-V LVTTL /
LVCMOS
6 mA — 608 — 610 — 721 — 888 ps
3 mA — 681 — 685 — 2012 — 2477 ps
1.5-V LVCMOS
4 mA — 1162 — 1157 — 1590 — 1957 ps
2 mA — 1245 — 1244 — 3269 — 4024 ps
1.2-V LVCMOS 3 mA — 1889 — 1856 — 2860 — 3520 ps
3.3-V PCI 20 mA — 72 — 74 — –18 — –22 ps
LVDS — — 126 — 127 — 155 — 191 ps
RSDS — — 126 — 127 — 155 — 191 ps
Table 3–21. t
ZX
IOE Microparameter Adders for Slow Slew Rate for MAX V Devices
Standard
5M40Z/ 5M80Z/ 5M160Z/
5M240Z/ 5M570Z
5M1270Z/ 5M2210Z
Unit
C4 C5, I5 C4 C5, I5
Min Max Min Max Min Max Min Max
3.3-V LVTTL
16 mA — 5,951 — 6,063 — 6,012 — 5,743 ps
8 mA — 6,534 — 6,662 — 8,785 — 8,516 ps
3.3-V LVCMOS
8 mA — 5,951 — 6,063 — 6,012 — 5,743 ps
4 mA — 6,534 — 6,662 — 8,785 — 8,516 ps
2.5-V LVTTL /
LVCMOS
14 mA — 9,110 — 9,237 — 10,072 — 9,803 ps
7 mA — 9,830 — 9,977 — 12,945 — 12,676 ps
1.8-V LVTTL /
LVCMOS
6 mA — 21,800 — 21,787 — 21,185 — 20,916 ps
3 mA — 23,020 — 23,037 — 24,597 — 24,328 ps
1.5-V LVCMOS
4 mA — 39,120 — 39,067 — 34,517 — 34,248 ps
2 mA — 40,670 — 40,617 — 39,717 — 39,448 ps
1.2-V LVCMOS 3 mA — 69,505 — 70,461 — 55,800 — 55,531 ps
3.3-V PCI 20 mA — 6,534 — 6,662 — 35 — 44 ps
Chapter 3: DC and Switching Characteristics for MAX V Devices 3–15
Timing Model and Specifications
May 2011 Altera Corporation MAX V Device Handbook
Table 3–22. t
XZ
IOE Microparameter Adders for Fast Slew Rate for MAX V Devices
Standard
5M40Z/ 5M80Z/ 5M160Z/
5M240Z/ 5M570Z
5M1270Z/ 5M2210Z
Unit
C4 C5, I5 C4 C5, I5
Min Max Min Max Min Max Min Max
3.3-V LVTTL
16 mA—0—0—0—0 ps
8 mA — –69 — –69 — –74 — –91 ps
3.3-V LVCMOS
8 mA—0—0—0—0 ps
4 mA — –69 — –69 — –74 — –91 ps
2.5-V LVTTL /
LVCMOS
14 mA — –7 — –10 — –46 — –56 ps
7 mA — –66 — –69 — –82 — –101 ps
1.8-V LVTTL /
LVCMOS
6 mA — 45 — 37 — –7 — –8 ps
3 mA — 34 — 25 — 119 — 147 ps
1.5-V LVCMOS
4 mA — 166 — 155 — 339 — 418 ps
2 mA — 190 — 179 — 464 — 571 ps
1.2-V LVCMOS 3 mA — 300 — 283 — 817 — 1,006 ps
3.3-V PCI 20 mA — –69 — –69 — 80 — 99 ps
LVDS — — –7 — –10 — –46 — –56 ps
RSDS — — –7 — –10 — –46 — –56 ps
Table 3–23. t
XZ
IOE Microparameter Adders for Slow Slew Rate for MAX V Devices
Standard
5M40Z/ 5M80Z/ 5M160Z/
5M240Z/ 5M570Z
5M1270Z/ 5M2210Z
Unit
C4 C5, I5 C4 C5, I5
Min Max Min Max Min Max Min Max
3.3-V LVTTL
16 mA — 171 — 174 — 73 — –132 ps
8 mA — 112 — 116 — 758 — 553 ps
3.3-V LVCMOS
8 mA — 171 — 174 — 73 — –132 ps
4 mA — 112 — 116 — 758 — 553 ps
2.5-V LVTTL /
LVCMOS
14 mA — 213 — 213 — 32 — –173 ps
7 mA — 166 — 166 — 714 — 509 ps
1.8-V LVTTL /
LVCMOS
6 mA — 441 — 438 — 96 — –109 ps
3 mA — 496 — 494 — 963 — 758 ps
1.5-V LVCMOS
4 mA — 765 — 755 — 238 — 33 ps
2 mA — 903 — 897 — 1,319 — 1,114 ps
1.2-V LVCMOS 3 mA — 1,159 — 1,130 — 400 — 195 ps
3.3-V PCI 20 mA — 112 — 116 — 303 — 373 ps
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30

5M160ZM68I5N

Mfr. #:
Buy 5M160ZM68I5N
Manufacturer:
Intel / Altera
Description:
CPLD - Complex Programmable Logic Devices CPLD - MAX V 128 Macro 52 IOs
Lifecycle:
New from this manufacturer.
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