QPro Virtex 2.5V QML High-Reliability FPGAs
DS002 (v1.5) December 5, 2001
www.xilinx.com
21
Preliminary Product Specification
1-800-255-7778
R
V
REF
, Bank 0
(VREF pins are listed incrementally.
Connect all pins listed for both the
required device and all smaller
devices listed in the same package.)
Within each bank, if input reference
voltage is not required, all V
REF
pins
are general I/O.
XQV100 A4, A8, B4 - - -
XQV300 - A16, C19,
C21, D21
B19, D22, D24,
D26
-
XQV600 - - ... + C18, C24 -
XQV1000 - - - A19, D20, D26,
D29, E21, E23,
E24, E27,
V
REF
, Bank 1
(VREF pins are listed incrementally.
Connect all pins listed for both the
required device and all smaller
devices listed in the same package.)
Within each bank, if input reference
voltage is not required, all V
REF
pins
are general I/O.
XQV100 A17, B12,
B15
-- -
XQV300 - B6, C9, C12,
D6
A13, B7, C6,
C10
-
XQV600 - - ... + B15, D10 -
XQV1000 - - - A6, D7, D10,
D11, D13, D16,
E7, E15
V
REF
, Bank 2
(V
REF
pins are listed incrementally.
Connect all pins listed for both the
required device and all smaller
devices listed in the same package.)
Within each bank, if input reference
voltage is not required, all V
REF
pins
are general I/O.
XQV100 C20, F19, J18 - - -
XQV300 - D2, E2, H2,
M4
E2, G3, J2, N1 -
XQV600 - - ... + H1, R3 -
XQV1000 - - - B3, G5, H4, K5,
L5, N5, P4, R1
V
REF
, Bank 3
(V
REF
pins are listed incrementally.
Connect all pins listed for both the
required device and all smaller
devices listed in the same package.)
Within each bank, if input reference
voltage is not required, all V
REF
pins
are general I/O.
XQV100 M18, R19,
V20
-- -
XQV300 - R4, V4, Y3,
AC2
V2, AB4, AD4,
AF3
-
XQV600 - - ... + U2, AC3 -
XQV1000 - - - V4, W5, AA4,
AD3, AE5, AF1,
AH4, AK2
Table 4:
Virtex Plastic Ball Grid and Ceramic Column Grid Pinout Information (Continued)
Pin Name Device BG256 BG352 BG432 BG560/CG560