LTC6803-1/LTC6803-3
19
680313fa
OPERATION
Figure 5
XOR
BEGIN PEC[7:0] = 0x41
PEC Hardware and Software Example
BEGIN PEC[7:0] = 0x41
END
IN0
INO
IN0
PEC2
XOR
XOR
PEC[0]
PEC[1]
PEC1
PEC[7]
DATAIN
CLOCK
PEC[0]
CLK
DTFF
D Q
Q
PEC[1]
CLK
DTFF
D Q
Q
PEC[2]
CLK
DTFF
D Q
Q
1
INO = DATAIN XOR PEC[7];
1
INO = DATAIN XOR PEC[7];
2
PEC1 = PEC[0] XOR IN0;
2
PEC1 = PEC[0] XOR IN0;
3
PEC2 = PEC[1] XOR IN0;
3
PEC2 = PEC[1] XOR IN0;
4
PEC[7:0] = {PEC[6:2], PEC2, PEC1, IN0};
4
PEC[7:0] = {PEC[6:2], PEC2, PEC1, IN0};
PEC[2] PEC[3] PEC[4]
END
PEC[5] PEC[6]
PEC[7]
680313 F05
PEC[3]
CLK
DTFF
D Q
Q
PEC[4]
CLK
DTFF
D Q
Q
PEC[5]
CLK
DTFF
D Q
Q
PEC[6]
CLK
DTFF
D Q
Q
PEC[7]
CLK
DTFF
D Q
Q
LTC6803-1/LTC6803-3
20
680313fa
OPERATION
Toggle Polling: Toggle polling allows a robust determina-
tion both of device states and of the integrity of the con-
nections between the devices in a stack. Toggle polling is
enabled when the LVLPL bit is low. After entering a polling
command, the data out line will be driven by the slave
devices based on their status. When polling for the ADC
converter status, data out will be low when any device is
busy performing an ADC conversion and will toggle at
1kHz when no device is busy. Similarly, when polling for
interrupt status, the output will be low when any device
has an interrupt condition and will toggle at 1kHz when
none has an interrupt condition.
Toggle Polling—Daisy-Chained Broadcast Polling: The
SDO pin (bottom device) or SDI pin (stacked devices) will
be low if a device is busy/in interrupt. If it is not busy/not
in interrupt, the device will pass the signal from the SDOI
input to data out (if not the top-of-stack device) or toggle
the data out line at 1kHz (if the top-of-stack device). The
master pulls CSBI high to exit polling.
Level Polling: Level polling is enabled when the LVLPL
bit is high. After entering a polling command, the data
out line will be driven by the slave devices based on their
status. When polling for the ADC converter status, data
out will be low when any device is busy performing an
ADC conversion and will be high when no device is busy.
Similarly, when polling for interrupt status, the output will
be low when any device has an interrupt condition and will
be high when none has an interrupt condition.
Level Polling—Daisy-Chained Broadcast Polling: The SDO
pin (bottom device) or SDI pin (stacked devices) will be
low if a device is busy/in interrupt. If it is not busy/not
in interrupt, the device will pass the level from the SDOI
input to data out (if not the top-of-stack device) or hold the
data out line high (if the top-of-stack device). Therefore,
if any device in the chain is busy or in interrupt, the SDO
signal at the bottom of the stack will be low. If all devices
are not busy/not in interrupt, the SDO signal at the bot-
tom of the stack will be high. The master pulls CSBI high
to exit polling.
CSBI
SCKI
SDI
SDO
MSB (CMD)
BIT6 (CMD) LSB (PEC)
TOGGLE OR LEVEL POLL
t
CYCLE
680313 F06
Figure 6. Transmission Format (ADC Conversion and Poll)
CSBI
SCKI
SDI
SDO
MSB (CMD)
BIT6 (CMD) LSB (PEC)
TOGGLE OR LEVEL POLL
680313 F07
Figure 7. Transmission Format (PLADC Conversion or PLINT)
LTC6803-1/LTC6803-3
21
680313fa
OPERATION
Table 4. Broadcast Read
8 8 8 8 8 8 8
Command PEC Data Byte Low Data Byte High PEC Shift Byte 1 Shift Byte N
Table 5. Broadcast Write
8 8 8 8 8 8 8
Command PEC Data Byte Low Data Byte High PEC Shift Byte 1 Shift Byte N
See Serial Command examples.
COMMAND DESCRIPTION NAME CODE PEC
Write Configuration Register Group WRCFG 01 C7
Read Configuration Register Group RDCFG 02 CE
Read All Cell Voltage Group RDCV 04 DC
Read Cell Voltages 1-4 RDCVA 06 D2
Read Cell Voltages 5-8 RDCVB 08 F8
Read Cell Voltages 9-12 RDCVC 0A F6
Read Flag Register Group RDFLG 0C E4
Read Temperature Register Group RDTMP 0E EA
Start Cell Voltage ADC Conversions and Poll Status STCVAD All
Cell 1
Cell 2
Cell 3
Cell 4
Cell 5
Cell 6
Cell 7
Cell 8
Cell 9
Cell 10
Cell 11
Cell 12
Clear (FF)
Self Test1
Self Test2
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
1F
B0
B7
BE
B9
AC
AB
A2
A5
88
8F
86
81
94
93
9A
9D
Revision Code: The diagnostic register group contains a
2-bit revision code. If software detection of device revision
is necessary, then contact the factory for details. Otherwise,
the code can be ignored. In all cases, however, the values
of all bits must be used when calculating the packet error
code (PEC) byte on data reads.
Bus Protocols: There are 3 different protocol formats,
depicted in Table 3 through Table 5. Table 2 is the key for
reading the protocol diagrams.
Table 2. Protocol Key
PEC Packet Error Code Master-to-Slave
N Number of Bits Slave-to-Master
... Continuation of Protocol Complete Byte of
Data
Table 3. Broadcast Poll Command
8 8
Command PEC Poll Data
Table 6. Command Codes and PEC Bytes

LTC6803IG-3#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management Battery Stack Monitor, Daisy Chain SPI
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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