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PCA85233UG/2DA/Q1Z

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54
PCA85233 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 6 May 2015 52 of 54
NXP Semiconductors
PCA85233
Automotive 80 × 4 LCD driver for low multiplex rates
25. Tables
Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .2
Table 2. Ordering options . . . . . . . . . . . . . . . . . . . . . . . . .2
Table 3. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2
Table 4. Pin description overview . . . . . . . . . . . . . . . . . .4
Table 5. Definition of commands . . . . . . . . . . . . . . . . . . .5
Table 6. Mode-set command bit description . . . . . . . . . .5
Table 7. Load-data-pointer command bit description . . .5
Table 8. Device-select command bit description . . . . . . .6
Table 9. Bank-select command bit description
[1]
. . . . . . .6
Table 10. Blink-select command bit description . . . . . . . .6
Table 11. LCD frame frequencies . . . . . . . . . . . . . . . . . . .7
Table 12. Blink frequencies . . . . . . . . . . . . . . . . . . . . . . . .8
Table 13. Standard RAM filling in 1:3 multiplex drive
mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 14. Entire RAM filling by rewriting in 1:3 multiplex
drive mode . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Table 15. Selection of possible display configurations . . .14
Table 16. Biasing characteristics . . . . . . . . . . . . . . . . . . .15
Table 17. I
2
C slave address byte . . . . . . . . . . . . . . . . . . .26
Table 18. Control byte description . . . . . . . . . . . . . . . . . .28
Table 19. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . .30
Table 20. Static characteristics . . . . . . . . . . . . . . . . . . . .31
Table 21. Dynamic characteristics . . . . . . . . . . . . . . . . . .33
Table 22. Addressing cascaded PCA85233 . . . . . . . . . .36
Table 23. Dimensions of PCA85233UG . . . . . . . . . . . . .40
Table 24. Bump locations of PCA85233UG . . . . . . . . . . .40
Table 25. Gold bump hardness . . . . . . . . . . . . . . . . . . . .43
Table 26. Alignment mark locations . . . . . . . . . . . . . . . .43
Table 27. Specification of 3 inch tray details. . . . . . . . . . .45
Table 28. Selection of LCD segment drivers . . . . . . . . . .46
Table 29. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .48
Table 30. Revision history . . . . . . . . . . . . . . . . . . . . . . . .49
PCA85233 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 6 May 2015 53 of 54
NXP Semiconductors
PCA85233
Automotive 80 × 4 LCD driver for low multiplex rates
26. Figures
Fig 1. Rear side laser marking. . . . . . . . . . . . . . . . . . . . .2
Fig 2. Block diagram of PCA85233 . . . . . . . . . . . . . . . . .3
Fig 3. Pin configuration for PCA85233 . . . . . . . . . . . . . .4
Fig 4. Display RAM bitmap . . . . . . . . . . . . . . . . . . . . . . .9
Fig 5. Relationships between LCD layout, drive mode,
display RAM filling order, and display data
transmitted over the I
2
C-bus . . . . . . . . . . . . . . . .10
Fig 6. Example of displays suitable for PCA85233 . . . .14
Fig 7. Typical system configuration . . . . . . . . . . . . . . . .15
Fig 8. Electro-optical characteristic: relative
transmission curve of the liquid . . . . . . . . . . . . . .17
Fig 9. Static drive mode waveforms. . . . . . . . . . . . . . . .18
Fig 10. Waveforms for the 1:2 multiplex drive mode
with
1
⁄
2
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Fig 11. Waveforms for the 1:2 multiplex drive mode
with
1
⁄
3
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Fig 12. Waveforms for the 1:3 multiplex drive mode
with
1
⁄
3
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Fig 13. Waveforms for the 1:4 multiplex drive mode
with
1
⁄
3
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Fig 14. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Fig 15. Definition of START and STOP conditions. . . . . .25
Fig 16. System configuration . . . . . . . . . . . . . . . . . . . . . .25
Fig 17. Acknowledgement on the I
2
C-bus . . . . . . . . . . . .26
Fig 18. I
2
C-bus protocol. . . . . . . . . . . . . . . . . . . . . . . . . .27
Fig 19. Control byte format . . . . . . . . . . . . . . . . . . . . . . .27
Fig 20. Device protection diagram . . . . . . . . . . . . . . . . . .28
Fig 21. Current consumption with respect to external
clock frequency . . . . . . . . . . . . . . . . . . . . . . . . . .32
Fig 22. Frame frequency with respect to temperature. . .34
Fig 23. Driver timing waveforms . . . . . . . . . . . . . . . . . . .35
Fig 24. I
2
C-bus timing waveforms . . . . . . . . . . . . . . . . . .35
Fig 25. Cascaded PCA85233 configuration. . . . . . . . . . .36
Fig 26. Synchronization of the cascade for the various
PCA85233 drive modes. . . . . . . . . . . . . . . . . . . .37
Fig 27. Bare die outline of PCA85233UG . . . . . . . . . . . .39
Fig 28. Alignment marks of PCA85233 . . . . . . . . . . . . . .43
Fig 29. Tray details of PCA85233UG. . . . . . . . . . . . . . . .44
Fig 30. Die alignment in the tray . . . . . . . . . . . . . . . . . . .45
NXP Semiconductors
PCA85233
Automotive 80 × 4 LCD driver for low multiplex rates
© NXP Semiconductors N.V. 2015. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 6 May 2015
Document identifier: PCA85233
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
27. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
3.1 Ordering options. . . . . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 5
7.1 Commands of PCA85233. . . . . . . . . . . . . . . . . 5
7.2 Clock and frame frequency. . . . . . . . . . . . . . . . 6
7.2.1 Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.2.1.1 Internal clock . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.2.1.2 External clock . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.2.2 Frame frequency . . . . . . . . . . . . . . . . . . . . . . . 7
7.2.3 Blinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.3 Display RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.3.1 Data pointer . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.3.2 Subaddress counter . . . . . . . . . . . . . . . . . . . . 11
7.3.3 RAM writing in 1:3 multiplex drive mode. . . . . 11
7.3.4 Writing over the RAM address boundary . . . . 12
7.3.5 Output bank selector . . . . . . . . . . . . . . . . . . . 12
7.3.6 Input bank selector . . . . . . . . . . . . . . . . . . . . . 13
7.4 Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.5 Possible display configurations . . . . . . . . . . . 14
7.6 LCD bias generator . . . . . . . . . . . . . . . . . . . . 15
7.7 LCD voltage selector . . . . . . . . . . . . . . . . . . . 15
7.7.1 Electro-optical performance . . . . . . . . . . . . . . 17
7.8 LCD drive mode waveforms . . . . . . . . . . . . . . 18
7.8.1 Static drive mode . . . . . . . . . . . . . . . . . . . . . . 18
7.8.2 1:2 Multiplex drive mode. . . . . . . . . . . . . . . . . 19
7.8.3 1:3 Multiplex drive mode. . . . . . . . . . . . . . . . . 21
7.8.4 1:4 Multiplex drive mode. . . . . . . . . . . . . . . . . 22
7.9 Backplane outputs . . . . . . . . . . . . . . . . . . . . . 23
7.10 Segment outputs. . . . . . . . . . . . . . . . . . . . . . . 23
8 Characteristics of the I
2
C-bus . . . . . . . . . . . . 24
8.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.2 START and STOP conditions . . . . . . . . . . . . . 24
8.3 System configuration . . . . . . . . . . . . . . . . . . . 25
8.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.5 I
2
C-bus controller . . . . . . . . . . . . . . . . . . . . . . 26
8.6 Input filters . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.7 I
2
C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . 26
9 Internal circuitry. . . . . . . . . . . . . . . . . . . . . . . . 28
10 Safety notes . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
11 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 30
12 Static characteristics . . . . . . . . . . . . . . . . . . . 31
13 Dynamic characteristics. . . . . . . . . . . . . . . . . 33
14 Application information . . . . . . . . . . . . . . . . . 35
14.1 Cascaded operation. . . . . . . . . . . . . . . . . . . . 35
15 Test information . . . . . . . . . . . . . . . . . . . . . . . 38
15.1 Quality information. . . . . . . . . . . . . . . . . . . . . 38
16 Bare die outline . . . . . . . . . . . . . . . . . . . . . . . . 39
17 Handling information . . . . . . . . . . . . . . . . . . . 44
18 Packing information . . . . . . . . . . . . . . . . . . . . 44
18.1 Packing information on the tray . . . . . . . . . . . 44
19 Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
19.1 LCD segment driver selection . . . . . . . . . . . . 46
20 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 48
21 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
22 Revision history . . . . . . . . . . . . . . . . . . . . . . . 49
23 Legal information . . . . . . . . . . . . . . . . . . . . . . 50
23.1 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 50
23.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
23.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 50
23.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 51
24 Contact information . . . . . . . . . . . . . . . . . . . . 51
25 Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
26 Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
27 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54

PCA85233UG/2DA/Q1Z

Mfr. #:
Buy PCA85233UG/2DA/Q1Z
Manufacturer:
NXP Semiconductors
Description:
LCD Drivers PCA85233UG/WLCSP201//2DA/Q1/DIE 3 WAFFLE CARRIERS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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