PAC1710/20
DS20005386B-page 14 2015-2016 Microchip Technology Inc.
4.1 Power States
The PAC1710/20 has three states of operation:
•Active
– The PAC1710/20 initiates conversion
cycles for the programmed conversion rate.
• Standby
– This is the lowest power state. There
are no conversion cycles. The majority of circuitry
is powered-down to reduce supply current to a
minimum. The SMBus is active and the part will
return requested data. To enter the Standby state,
disable all measurements (see Register 6-1).
• One-Shot
– While the device is in the Standby
state, the host can initiate a conversion cycle on
demand (see Register 6-3). After the conversion
cycle is complete, the device will return to the
Standby state.
4.2 Conversion Cycle
The conversion cycle is the period of time in which the
measurements are taken and the data is updated. In the
Active state, individual measurement can be disabled.
In the Standby state, all measurements are updated.
During the conversion cycle, both channels on the
PAC1720 begin taking measurements at the same time.
In both devices, the V
SENSE
sample is taken first for its
programmed sample time. Then, the V
SOURCE
sample
is taken for its programmed sample time. Digital
averaging may be applied to average the last 2-8
samples. Sample time and digital averaging have
separate controls for V
SENSE
and V
SOURCE
as well as
for each channel, in the case of PAC1720. (see
Register 6-7 and Register 6-8).
At the end of the conversion cycle, the enabled
measurements are updated. The Power Ratio, High
Limit Status (which includes a CONV_DONE status bit),
and Low Limit Status registers are always updated. The
ALERT
pin will be asserted, by default, if any out-of-limit
conditions exist (see Section 4.7 “ALERT Output”).
4.3 Conversion Rate
For power management in the Active state, a conversion
rate can be programmed. Conversion rate specifies how
often measurement data should be updated. Once per
second is the lowest setting (see Register 6-2).
If the actual sampling time for both measurements
(V
SOURCE
and V
SENSE
) is greater than 1/conversion
rate for either channel, the PAC1710/20 will override
the programmed conversion rate and operate in
continuous mode.
4.4 Current Measurement
The PAC1710/20 includes one or two high-side current
sensing circuits. These circuits measure the voltage
(V
SENSE
) induced across a fixed external current sense
resistor (R
SENSE
) and stores the voltage as a signed
11-bit (by default) number in the Sense Voltage registers.
The PAC1710/20 current sensing operates in one of
four bipolar Full-Scale Ranges (FSR): ±10 mV,
±20 mV, ±40 mV, or ±80 mV (see Section 4.4
“Current Measurement”). The default FSR is ±80 mV.
Full-Scale Current (FSC) can be calculated from
Equation 4-1.
EQUATION 4-1: FULL-SCALE CURRENT
The actual current through R
SENSE
can then be
calculated using Equation 4-2.
EQUATION 4-2: BUS CURRENT
As an example, suppose the system is drawing 1.65A
through a 10 mΩ resistor, the FSR is set for ±20 mV,
and sample time is 80 ms. Using Equation 4-1, the FSC
is 2A. The measured V
SENSE
is 1.65A 10 mΩ =
16.5 mV. This value of V
SENSE
is represented in the
Sense Voltage Registers as 69_8h
(0110_1001_1000b or 1688d) ignoring the 4 lower
bits of the low byte as these are always 0. This value,
when applied to Equation 4-2, results in an I
BUS
current
of 1.649A.
FSC
FSR
R
SENSE
----------------------=
Where:
FSC = Full-scale current
FSR = ±10mV, ±20mV, ±40mV, or ±80mV
(see Tabl e 4-6)
R
SENSE
= External sense resistor value
I
BUS
FSC
V
SENSE
Denominator
-----------------------------------
=
Where:
I
BUS
= Actual bus current
FSC = Full-scale current value (from
Equation 4-1)
V
SENSE
= The value read from the Sense
Voltage Registers (in decimal),
ignoring the four lowest bits
which are always zero (see
Register 6-10 and
Register 6-11 for PAC1720)
Denominator = Determined by the sample time,
as shown in Table 4-5.
