PAC1710/20
DS20005386B-page 16 2015-2016 Microchip Technology Inc.
Actual power drawn from the source can be calculated
using Equation 4-6.
EQUATION 4-6: BUS POWER
As an example, suppose that the actual pin voltage is
10.65V, the current through a 10 mΩ resistor is 1.65A,
the FSR is set for ±20 mV, and the sample times are
the defaults. The FSC value is 2A per Equation 4-1.
The FSV value is 39.96V per Equation 4-4. Using
Equation 4-5, the FSP value is 79.92W. Applying P = V
I, the expected power is 17.57W which is 21.98% of
the FSP value.
Reading the Power Ratio Registers will report P
RATIO
as 38_47h (0011_1000_0100_0111b or 14,407d).
Using Equation 4-6, this value results in a calculated
bus power of 17.57W which is ~21.98% of the FSP
value.
4.7 ALERT Output
The ALERT pin is an open-drain output and requires a
pull-up resistor to V
PULLUP.
The ALERT pin is used as an interrupt signal or as an
SMBus Alert signal that allows an SMBus slave to
communicate an error condition to the master. One or
more SMBus Alert outputs can be hardwired together.
The ALERT
pin will be asserted (by default) if the mea-
sured V
SOURCE
voltage or V
SENSE
voltage are out of
limit (≥ high limit or < low limit). The ALERT
pin will
remain asserted as long as an out-of-limit condition
remains. Once the out-of-limit condition has been
removed, the ALERT
pin will remain asserted until the
appropriate status bits are cleared.
The ALERT
pin can be masked for all out-of-limit
measurements by setting the MASK_ALL bit (see
Register 6-1) or for an individual out-of-limit
measurement (see Register 6-5). Once the ALERT
pin
has been masked, it will be de-asserted if no unmasked
out-of-limit conditions exist. Any interrupt conditions
that occur while the ALERT
pin is masked will update
the status registers normally.
The ALERT
pin can be asserted for 5 μs when all
measurements are finished (if enabled by setting
CONV_DONE_EN, see Register 6-1).
4.8 Conversion Rate
The Conversion Rate controls how often V
SENSE
,
V
SOURCE
, P
RATIO
and the status bits are updated in the
Active state (see Tab l e 4-1 ). The conversion rate
should only be updated when the PAC1710/20 is in the
Standby state. To do this, disable the measurements in
the Configuration Register 00h, wait for the conversion
cycle to complete by monitoring the XMEAS_DIS bits in
00h until they stay set to ‘1’, change the conversion
rate, and then enable the desired measurements.
4.9 Sampling Time and Resolution
The PAC1710/20 sampling interval and resolution for
measuring V
SOURCE
and V
SENSE
are register
controlled. The V
SOURCE
settings based on register
values are shown in Tab le 4 - 2 and Tabl e 4 -3 . The
V
SENSE
measurements have an additional parameter:
Full-Scale Resolution of the differential input. The
V
SENSE
settings based on register values are shown in
Table 4-4, Ta bl e 4 -5 and Tab le 4-6.
P
BUS
FSP
P
RATIO
65 535
----------------------
=
Where:
P
BUS
= The actual power provided by the
source measured at SENSE+
FSP = the full-scale power (from
Equation 4-5)
P
RATIO
= the value read from the Power Ratio
Registers (in decimal). See
Register 6-14 and Register 6-15
TABLE 4-1: CONVERSION RATE FOR
MEASUREMENT
CONV_RATE<2:0>
Conversion Rate
10
00 1 per sec
01 2 per sec
10 4 per sec
11Continuous (default)
TABLE 4-2: VOLTAGE SOURCE
SAMPLING TIME SETTINGS
VSRC_SAMP_TIME
V
SOURCE
Sample Time
Equation 4-3
Denominator
Equation 4-4
Denominator
00 2.5 ms (data = 8 bits) 256 255
01 5 ms (data = 9 bits) 512 511
1010 ms (data = 10 bits)
(Default)
1024 1023
1120 ms (data = 11 bits) 2048 2047
TABLE 4-3: VOLTAGE SOURCE
AVERAGING SETTINGS
VSRC_AVG Samples to Average
00Disabled (default)
01 2
10 4
11 8
