PAC1710/20
DS20005386B-page 28 2015-2016 Microchip Technology Inc.
REGISTER 6-6: LOW-LIMIT STATUS REGISTER (ADDRESS 05H)
U-0 U-0 U-0 U-0 RC-0 RC-0 RC-0 RC-0
— — — — C2VSL C2VRL C1VSL C1VRL
bit 7 bit 0
Legend:
R = Read bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = bit is set ‘0’ = Bit is cleared x = Bit in unknown
bit 7-4 Unimplemented: Read as ‘0’
bit 3 C2VSL: This bit is set when the channel 2
V
SENSE
falls below its programmed low limit (PAC1720)
1 = The channel 2 V
SENSE
voltage measurement caused the ALERT pin to be asserted (if enabled).
0 = Normal operation
Unimplemented: Read as ‘0’ (PAC1710)
bit 2 C2VRL: This bit is set when the channel 2 V
SOURCE
value falls below its programmed low limit.
1 = The channel 2 V
SOURCE
voltage measurement caused the ALERT pin to be asserted (if enabled).
0 = Normal Operation
Unimplemented: Read as ‘0’ (PAC1710)
bit 1 C1VSL: This bit is set when the channel 1 V
SENSE
value falls below its programmed low limit.
1 = The channel 1 V
SENSE
voltage measurement caused the ALERT pin to be asserted (if enabled).
0 = Normal Operation
bit 0 C1VRL: This bit is set when the channel 1 V
SOURCE
value falls below its programmed low limit.
1 = The channel 1 V
SOURCE
voltage measurement caused the ALERT pin to be asserted (if enabled).
0 = Normal Operation
REGISTER 6-7: V
SOURCE
SAMPLING CONFIGURATION REGISTER (ADDRESS 0AH)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
C2RS<1:0> C2RA<1:0> C1RS<1:0> C1RA<1:0>
bit 7 bit 0
Legend:
R = Read bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = bit is set ‘0’ = Bit is cleared x = Bit in unknown
bit 7-6 C2RS<1:0>: Determines the channel 2 V
SOURCE
measurement sample time, as shown in Table 4-2
(PAC1720). This will affect the resolution of the data presented in the V
SOURCE
Voltage Registers.
Unimplemented: Read as ‘0’ (PAC1710)
bit 5-4 C2RA<1:0>: Controls the digital averaging that is applied to the channel 2 V
SOURCE
measurement, as
shown in Ta bl e 4 -3 (PAC1720). This determines the number of consecutive samples that are
averaged.
Unimplemented: Read as ‘0’ (PAC1710)
bit 3-2 C1RS<1:0>: Determines the channel 1 V
SOURCE
measurement sample time, as shown in Table 4-2.
This will affect the resolution of the data presented in the V
SOURCE
Voltage Registers.
bit 1-0 C1RA<1:0>: Controls the digital averaging that is applied to the channel 1 V
SOURCE
measurement, as
shown in Ta bl e 4 -3 . This determines the number of consecutive samples that are averaged.
