LPC2917_19_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 31 July 2008 21 of 67
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
Address pins on the device are shared with other functions. When connecting external
memories, check that the I/O pin is programmed for the correct function. Control of these
settings is handled by the SCU.
8.3 General subsystem
8.3.1 General subsystem clock description
The general subsystem is clocked by CLK_SYS_GESS, see Section 7.2.2.
8.3.2 Chip and feature identification
8.3.2.1 Overview
The key features are:
• Identification of product
• Identification of features enabled
8.3.2.2 Description
The Chip/Feature ID (CFID) module contains registers which show and control the
functionality of the chip. It contains an ID to identify the silicon, and also registers
containing information about the features enabled or disabled on the chip.
8.3.2.3 CFID pin description
The CFID has no external pins.
8.3.3 System control unit
8.3.3.1 Overview
The SCU takes care of system-related functions.The key feature is configuration of the I/O
port-pins multiplexer.
8.3.3.2 Description
The SCU defines the function of each I/O pin of the LPC2917/19. The I/O pin
configuration should be consistent with peripheral function usage.
8.3.3.3 SCU pin description
The SCU has no external pins.
8.3.4 Event router
8.3.4.1 Overview
The event router provides bus-controlled routing of input events to the vectored interrupt
controller for use as interrupt or wake-up signals.
Key features:
• Up to 24 level-sensitive external interrupt pins, including CAN, LIN and RXD wake-up
features plus three internal event sources
• Input events can be used as interrupt source either directly or latched (edge-detected)
• Direct events disappear when the event becomes inactive
