LPC2917_19_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 31 July 2008 41 of 67
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
8.8.3 PCR subsystem clock description
The PCRSS is clocked by a number of different clocks. CLK_SYS_PCRSS clocks the
AHB side of the AHB to DTL bus bridge and CLK_PCR_SLOW clocks the CGU, RGU and
PMU internal logic, see Section 7.2.2. CLK_SYS_PCRSS is derived from
BASE_SYS_CLK, which can be switched off in low-power modes. CLK_PCR_SLOW is
derived from BASE_PCR_CLK and is always on in order to be able to wake up from
low-power modes.
8.8.4 Clock Generation Unit (CGU)
8.8.4.1 Overview
The key features are:
• Generation of 10 and 2 test-base clocks, selectable from several embedded clock
sources
• Crystal oscillator with power-down
• Control PLL with power-down
• Very low-power ring oscillator, always on to provide a ‘safe clock’
• Seven fractional clock dividers with L/D division
• Individual source selector for each base clock, with glitch-free switching
• Autonomous clock-activity detection on every clock source
• Protection against switching to invalid or inactive clock sources
• Embedded frequency counter
• Register write-protection mechanism to prevent unintentional alteration of clocks
Remark: Any clock-frequency adjustment has a direct impact on the timing of on-board
peripherals such as the UARTs, SPI, watchdog, timers, CAN controller, LIN master
controller, ADCs or flash memory interface.
8.8.4.2 Description
The clock generation unit provides 10 internal clock sources as described in Table 23.
[1] Maximum frequency that guarantees stable operation of the LPC2917/19.
[2] Fixed to low-power oscillator.
Table 23. CGU base clocks
Numbe
r
Name Frequency
(MHz)
[1]
Description
0 BASE_SAFE_CLK 0.4 base safe clock (always on)
1 BASE_SYS_CLK 80 base system clock
2 BASE_PCR_CLK 0.4
[2]
base PCR subsystem clock
3 BASE_IVNSS_CLK 80 base IVNSS subsystem clock
4 BASE_MSCSS_CLK 80 base MSCSS subsystem clock
5 BASE_UART_CLK 80 base UART clock
6 BASE_SPI_CLK 40 base SPI clock
7 BASE_TMR_CLK 80 base timers clock
8 BASE_ADC_CLK 4.5 base ADCs clock
