LPC2917_19_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 31 July 2008 4 of 67
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
u Allows minimization of system operating power consumption in any configuration.
n Standard ARM test and debug interface with real-time in-circuit emulator.
n Boundary-scan test supported.
n Dual power supply:
u CPU operating voltage: 1.8 V ± 5%.
u I/O operating voltage: 2.7 V to 3.6 V; inputs tolerant up to 5.5 V.
n 144-pin LQFP package.
n 40 °C to 85 °C ambient operating temperature range.
4. Ordering information
4.1 Ordering options
Table 1. Ordering information
Type number Package
Name Description Version
LPC2917FBD144 LQFP144 plastic low profile quad flat package; 144 leads; body 20 × 20 × 1.4 mm SOT486-1
LPC2919FBD144 LQFP144 plastic low profile quad flat package; 144 leads; body 20 × 20 × 1.4 mm SOT486-1
Table 2. Part options
Type number Flash memory RAM SMC LIN 2.0 Package
LPC2917FBD144 512 kB 80 kB (including TCMs) 32-bit 2 LQFP144
LPC2919FBD144 768 kB 80 kB (including TCMs) 32-bit 2 LQFP144
LPC2917_19_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 31 July 2008 5 of 67
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
5. Block diagram
Fig 1. LPC2917/19 block diagram
002aad840
ARM968E-S
DTCM
16 kB
ITCM
16 kB
TEST/DEBUG
INTERFACE
EXTERNAL STATIC
MEMORY CONTROLLER
EMBEDDED FLASH
512/768 kB
EMBEDDED SRAM 32 kB
SYSTEM CONTROL
TIMER0/1 MTMR
CAN0/1
GLOBAL
ACCEPTANCE
FILTER
LIN0/1
PWM0/1/2/3
ADC1/2
EVENT ROUTER
EMBEDDED SRAM 16 kB
GENERAL PURPOSE I/O
PORTS 0/1/2/3
TIMER 0/1/2/3
SPI0/1/2
UART0/1
WDT
AHB TO APB
BRIDGE
AHB TO DTL
BRIDGE
VECTORED
INTERRUPT
CONTROLLER
AHB TO DTL
BRIDGE
AHB TO APB
BRIDGE
AHB TO APB
BRIDGE
AHB TO APB
BRIDGE
CLOCK
GENERATION
UNIT
POWER
MANAGEMENT
UNIT
RESET
GENERATION
UNIT
LPC2917/2919
JTAG
interface
AHB bus
LPC2917_19_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 31 July 2008 6 of 67
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
6. Pinning information
6.1 Pinning
6.2 Pin description
6.2.1 General description
The LPC2917/19 has up to four ports: two of 32 pins each, one of 28 pins and one of 16
pins. The pin to which each function is assigned is controlled by the SFSP registers in the
SCU. The functions combined on each port pin are shown in the pin description tables in
this section.
6.2.2 LQFP144 pin assignment
Fig 2. Pin configuration for SOT486-1 (LQFP144)
LPC2917FBD144
LPC2919FBD144
108
37
72
144
109
73
1
36
002aad935
Table 3. LQFP144 pin assignment
Pin name Pin Description
Default function Function 1 Function 2 Function 3
TDO 1 IEEE 1149.1 test data out
P2[21]/PCAP2[1]/D19 2 GPIO 2, pin 21 - PWM2 CAP1 EXTBUS D19
P0[24]/TXD1/TXDC1/SCS2[0] 3 GPIO 0, pin 24 UART1 TXD CAN1 TXDC SPI2 SCS0
P0[25]/RXD1/RXDC1/SDO2 4 GPIO 0, pin 25 UART1 RXD CAN1 RXDC SPI2 SDO
P0[26]/SDI2 5 GPIO 0, pin 26 - - SPI2 SDI
P0[27]/SCK2 6 GPIO 0, pin 27 - - SPI2 SCK
P0[28]/CAP0[0]/MAT0[0] 7 GPIO 0, pin 28 - TIMER0 CAP0 TIMER0 MAT0
P0[29]/CAP0[1]/MAT0[1] 8 GPIO 0, pin 29 - TIMER0 CAP1 TIMER0 MAT1
V
DD(IO)
9 3.3 V power supply for I/O
P2[22]/PCAP2[2]/D20 10 GPIO 2, pin 22 - PWM2 CAP2 EXTBUS D20
P2[23]/PCAP3[0]/D21 11 GPIO 2, pin 23 - PWM3 CAP0 EXTBUS D21
P3[6]/SCS0[3]/PMAT1[0]/TXDL1 12 GPIO 3, pin 6 SPI0 SCS3 PWM1 MAT0 LIN1 TXDL
P3[7]/SCS2[1]/PMAT1[1]/RXDL1 13 GPIO 3, pin 7 SPI2 SCS1 PWM1 MAT1 LIN1 RXDL
P0[30]/CAP0[2]/MAT0[2] 14 GPIO 0, pin 30 - TIMER0 CAP2 TIMER0 MAT2
P0[31]/CAP0[3]/MAT0[3] 15 GPIO 0, pin 31 - TIMER0 CAP3 TIMER0 MAT3

LPC2919FBD144/01/,

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
ARM Microcontrollers - MCU ARM968 768K FL/48K
Lifecycle:
New from this manufacturer.
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