9397 750 14965 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 02 — 20 June 2005 37 of 58
Philips Semiconductors
SC16C654B/654DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
8. Limiting values
Table 26: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage - 7 V
V
n
voltage at any pin GND 0.3 V
CC
+ 0.3 V
T
amb
ambient temperature 40 +85 °C
T
stg
storage temperature 65 +150 °C
P
tot(pack)
total power dissipation per
package
- 500 mW
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9397 750 14965 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 02 — 20 June 2005 38 of 58
Philips Semiconductors
SC16C654B/654DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
9. Static characteristics
[1] Except XTAL2, V
OL
= 1 V typical.
[2] When using crystal oscillator. The use of an external clock will increase the sleep current.
[3] Refer to Table 2 “Pin description” on page 10 for a listing of pins having internal pull-up resistors.
Table 27: Static characteristics
T
amb
=
40
°
C to +85
°
C; tolerance of V
CC
=
±
10 %, unless otherwise specified.
Symbol Parameter Conditions V
CC
= 2.5 V V
CC
= 3.3 V V
CC
= 5.0 V Unit
Min Typ Max Min Typ Max Min Typ Max
V
IL(CK)
LOW-level clock input voltage 0.3 - 0.45 0.3 - 0.6 0.5 - 0.6 V
V
IH(CK)
HIGH-level clock input voltage 1.8 - V
CC
2.4 - V
CC
3.0 - V
CC
V
V
IL
LOW-level input voltage
(except XTAL1 clock)
0.3 - 0.65 0.3 - 0.8 0.5 - 0.8 V
V
IH
HIGH-level input voltage
(except XTAL1 clock)
1.6 - - 2.0 - - 2.2 - - V
V
OL
LOW-level output voltage
on all outputs
[1]
I
OL
=5mA
(data bus)
--------0.4V
I
OL
=4mA
(other outputs)
-----0.4---V
I
OL
=2mA
(data bus)
--0.4------V
I
OL
= 1.6 mA
(other outputs)
--0.4------V
V
OH
HIGH-level output voltage I
OH
= 5mA
(data bus)
------2.4--V
I
OH
= 1mA
(other outputs)
---2.0-----V
I
OH
= 800 µA
(data bus)
1.85 - - ------V
I
OH
= 400 µA
(other outputs)
1.85 - - ------V
I
LIL
LOW-level input leakage
current
--±10 - - ±10 - - ±10 µA
I
CL
clock leakage - - ±30 - - ±30 - - ±30 µA
I
CC
supply current f = 5 MHz - - 4.5 - - 6 - - 6 mA
I
CCsleep
sleep current
[2]
- 200 - - 200 - - 200 - µA
C
i
input capacitance - - 5 - - 5 - - 5 pF
R
pu(int)
internal pull-up resistance
[3]
500 - - 500 - - 500 - - k
9397 750 14965 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 02 — 20 June 2005 39 of 58
Philips Semiconductors
SC16C654B/654DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
10. Dynamic characteristics
Table 28: Dynamic characteristics
T
amb
=
40
°
C to +85
°
C; tolerance of V
CC
=
±
10 %, unless otherwise specified.
Symbol Parameter Conditions V
CC
= 2.5 V V
CC
= 3.3 V V
CC
= 5.0 V Unit
Min Max Min Max Min Max
t
1w
, t
2w
clock pulse duration 10 - 6 - 6 - ns
f
XTAL
oscillator/clock frequency
[1] [2]
- 48 - 80 80 MHz
t
6s
address setup time 0 - 0 - 0 - ns
t
6h
address hold time 0 - 0 - 0 - ns
t
7d
IOR delay from chip select 10 - 10 - 10 - ns
t
7w
IOR strobe width 25 pF load 77 - 26 - 23 - ns
t
7h
chip select hold time from
IOR
0- 0- 0- ns
t
9d
read cycle delay 25 pF load 20 - 20 - 20 - ns
t
12d
delay from IOR to data 25 pF load - 77 - 26 - 23 ns
t
12h
data disable time 25 pF load - 15 - 15 - 15 ns
t
13d
IOW delay from chip select 10 - 10 - 10 - ns
t
13w
IOW strobe width 20 - 20 - 15 - ns
t
13h
chip select hold time from
IOW
0- 0- 0- ns
t
15d
write cycle delay 25 - 25 - 20 - ns
t
16s
data setup time 20 - 20 - 15 - ns
t
16h
data hold time 15 - 5 - 5 - ns
t
17d
delay from IOW to output 25 pF load - 100 - 33 - 29 ns
t
18d
delay to set interrupt from
Modem input
25 pF load - 100 - 24 - 23 ns
t
19d
delay to reset interrupt
from
IOR
25 pF load - 100 - 24 - 23 ns
t
20d
delay from stop to
set interrupt
-1T
RCLK
[3]
-1T
RCLK
[3]
-1T
RCLK
[3]
ns
t
21d
delay from IOR to
reset interrupt
25 pF load - 100 - 29 - 28 ns
t
22d
delay from start to set
interrupt
- 100 - 45 - 40 ns
t
23d
delay from IOW to transmit
start
8T
RCLK
[3]
24T
RCLK
[3]
8T
RCLK
[3]
24T
RCLK
[3]
8T
RCLK
[3]
24T
RCLK
[3]
ns
t
24d
delay from IOW to
reset interrupt
- 100 - 45 - 40 ns
t
25d
delay from stop to
set
RXRDY
-1T
RCLK
[3]
-1T
RCLK
[3]
-1T
RCLK
[3]
ns
t
26d
delay from IOR to
reset
RXRDY
- 100 - 45 - 40 ns
t
27d
delay from IOW to
set
TXRDY
- 100 - 45 - 40 ns

SC16C654DBIB64,151

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
UART Interface IC 4CH. UART 64B FIFO
Lifecycle:
New from this manufacturer.
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