31
AT49LD3200(B)
1940B–FLASH–11/01
AC Waveforms for Boot Block Read Operation
AC Characteristics for Boot Block Read Operation
Symbol Parameter Condition Min Max Units
t
ACC
Address to Output Delay
CS
= DQM
= V
IL
170 ns
t
OE
DQM to Output Delay CS = V
IL
60 ns
t
DF
DQM High to Output Float 40 ns
t
OH
Output Hold from Address 0 ns
ADDRESS VALID
t
ACC
t
DF
t
OH
HIGH-Z
OUTPUT VALID
t
OE
ADDRESS
DQM
OUTPUT
CS
32
AT49LD3200(B)
1940B–FLASH–11/01
l
Program Cycle Waveforms
Sector Erase Cycle Waveforms
Notes: 1. The Precharge command is optional. A Precharge command (CS, RAS, MR = L) during Program and Sector Erase cycles
(WE
= L) will be treated as NOP, and the number of clock cycles between the bus cycle and the Precharge command or vice
versa should be “Don’t Care”.
2. For boot block programming, RA = CA = A
0
~ A
12
and be held valid throughout program cycle; DQM should be held “H” dur-
ing the four-bus cycle command operation.
3. For boot block erasing, SA = X; DQM should be held “H” during the six-bus cycle command operation.
3-volt Program and Erase Cycle Characteristics
Symbol Parameter Typ Max Units
t
PGM
Word/Double Word Programming Time 50 600 µs
t
EC
Sector/Boot Block Erase Cycle Time 2.0/300 seconds/ms
t
BBL
Boot Block Lockout Enable Time 10 ms
I
CC2
V
CC
Current during Program and Erase Cycle 150 mA
High-speed 12-volt Program and Erase Cycle Characteristics
Symbol Parameter Typ Max Units
t
PGM
Word/Double Word Programming Time 15 200 µs
t
EC
Sector/Boot Block Erase Cycle Time 1.2/200 seconds/ms
I
CC3
V
CC
Current During Program and Erase Cycle 75 mA
I
PP3
V
PP
Current During Program and Erase Cycle 75 mA
CS
PROGRAM CYCLE
CLK
WE
RAS
CAS
AA
55
55
2A
AA
55
RA
CA
DATA
AA
55
A0
D
IN
ADDR
PRECHARGE COMMAND
t
PGM
PRECHARGE COMMAND PRECHARGE COMMAND PRECHARGE COMMAND
CS
SECTOR ERASE CYCLE
CLK
WE
RAS
CAS
AA
55
55
2A
AA
55
DATA
AA
55
80
AA
ADDR
t
EC
PRECHARGE
COMMAND
AA
55
55 2A SA X
55
30
PRECHARGE
COMMAND
PRECHARGE
COMMAND
PRECHARGE
COMMAND
PRECHARGE
COMMAND
PRECHARGE
COMMAND
33
AT49LD3200(B)
1940B–FLASH–11/01
Data Polling Waveforms
Note: During Program cycle, DATA = complement of loaded DQ7.
After Program cycle, DATA = same state as loaded DQ7.
During Sector Erase cycle, DATA = “0”; after Sector Erase cycle, DATA = “1”.
Data Polling Waveforms for Boot Block
Note: During Program cycle, DATA = complement of loaded DQ7.
After Program cycle, DATA = same state as loaded DQ7.
During Sector Erase cycle, DATA = “0”; after Sector Erase cycle, DATA = “1”.
DQM
CS
t
PGM
/t
EC
CLK
WE
RAS
CAS
DQ7
(RL2, CL5, BL4)
DATA
ADDR
READ
READ
(DATA POLLING)
RA CA
DATA
RA CA
DQM
CS
t
PGM
/t
EC
CLK
WE
RAS
CAS
DQ7
(RL2, CL5, BL4)
DATA
ADDR
READ
READ
(DATA POLLING)
DATA
VALID ADDRESS

AT49LD3200-13TC

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
NOR Flash 32M bit
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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