PCA8546 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 13 November 2013 26 of 63
NXP Semiconductors
PCA8546
4 x 44 automotive LCD driver
8.7 Backplane outputs
The LCD drive section includes four backplane outputs: BP0 to BP3 which must be
connected directly to the LCD.
8.8 Segment outputs
The LCD drive section includes up to 44 segment outputs (S0 to S43) which must be
connected directly to the LCD. The segment output signals are generated based on the
data resident in the display register. When less segment outputs are required, the unused
segment outputs must be left open-circuit.
8.9 Display RAM
The display RAM stores the LCD data. The RAM size is 44 4 bit.
Logic 1 in the RAM bit map indicates the on-state (V
on(RMS)
) of the corresponding LCD
element; similarly, logic 0 indicates the off-state (V
off(RMS)
). For more information on
V
on(RMS)
and V
off(RMS)
, see Section 8.4.
There is a one-to-one correspondence between
• the bits in the RAM bitmap and the LCD elements,
• the RAM columns and the segment outputs,
• the RAM rows and the backplane outputs.
The display RAM bit map, Figure 16
, shows row 0 to row 3 and column 0 to column 43.
Row 0 to row 3 correspond with the backplane outputs BP0 to BP3. Column 0 to column
43 correspond with the segment outputs S0 to S43. In multiplexed LCD applications, the
data of each row of the display RAM is time-multiplexed with the corresponding backplane
(row 0 with BP0, row 1 with BP1, and so on).
The display RAM bitmap shows the direct relationship between the display RAM column and the segment outputs and between
the bits in a RAM row and the backplane outputs.
Fig 16. Display RAM bitmap
'LVSOD\5$0DGGUHVVHVFROXPQVVHJPHQWRXWSXWV6
'LVSOD\5$0ELWVURZVEDFNSODQHRXWSXWV%3
DDD
0XOWLSOH[GULYHPRGH
%3
%3
%3
%3
6 6 6 6 6
6 6 6 6 6 6 6 6
