PCA8546 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 13 November 2013 40 of 63
NXP Semiconductors
PCA8546
4 x 44 automotive LCD driver
1
4
bias; internal oscillator; display enabled; LCD outputs are open circuit; RAM is all written with
logic 1; inputs at V
SS
or V
DD
; default display prescale factor; I
2
C-bus or SPI-bus inactive. Typical is
defined at V
DD
= 3.3 V, 25 C.
Fig 31. Typical I
DD
with respect to temperature
Power-down mode is enabled; I
2
C-bus or SPI-bus inactive. Typical is defined at 25 C.
Fig 32. Typical I
DD(LCD)
in power-down mode with respect to temperature
DDD
7
DPE
&
 



,
''
$
DDD
7
DPE
&
 


,
''/&'
$
9
/&'
 9
9
/&'
 9
PCA8546 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 13 November 2013 41 of 63
NXP Semiconductors
PCA8546
4 x 44 automotive LCD driver
1
4
bias; display enabled; LCD outputs are open circuit; RAM is all written with logic 1; default
display prescale factor. Typical is defined at 25 C.
Fig 33. Typical I
DD(LCD)
when display is active with respect to temperature
DDD
7
DPE
&
 



,
''/&'
$
9
/&'
 9
9
/&'
 9
PCA8546 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 13 November 2013 42 of 63
NXP Semiconductors
PCA8546
4 x 44 automotive LCD driver
14. Dynamic characteristics
[1] Frequency present on OSCCLK with default display frequency division factor.
Table 32. Dynamic characteristics
V
DD
= 1.8 V to 5.5 V; V
SS
= 0 V; V
LCD
= 2.5 V to 9 V; T
amb
=
40
C to +95
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
f
clk
clock frequency output on pin
OSCCLK; V
DD
=3.3V
[1]
7800 9600 11040 Hz
f
clk(ext)
external clock frequency EFR = 0 - - 250000 Hz
t
(RESET_N)
RESET_N pulse width LOW time 400 - - ns
External clock source used on pin OSCCLK
t
clk(H)
clock HIGH time 33 - - s
t
clk(L)
clock LOW time 33 - - s
(1) 40 C.
(2) 25 C.
(3) 85 C.
Fig 34. Typical clock frequency with respect to V
DD
and temperature
External clock source used on pin OSCCLK.
Fig 35. Driver timing waveforms
9
''
9
DDD


I
FON
N+]



DDD
26&&/.
W
FON+
W
FON/
I
FONH[W
9
''
9
''

PCA8546BTT/AJ

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
LCD Drivers PCA8546BTT/TSSOP56//A/REEL 13 Q1 NDP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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