PCA8546 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 13 November 2013 31 of 63
NXP Semiconductors
PCA8546
4 x 44 automotive LCD driver
9.2.4 Acknowledge
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of 8 bits is followed by an acknowledge
cycle.
• A slave receiver which is addressed must generate an acknowledge after the
reception of each byte.
• Also a master receiver must generate an acknowledge after the reception of each
byte that has been clocked out of the slave transmitter.
• The device that acknowledges must pull-down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times must be considered).
• A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Acknowledgement on the I
2
C-bus is shown in Figure 23.
9.2.5 I
2
C-bus controller
The PCA8546 acts as an I
2
C-bus slave receiver. It does not initiate I
2
C-bus transfers or
transmit data to an I
2
C-bus master receiver. Device selection depends on the I
2
C-bus
slave address.
9.2.6 Input filters
To enhance noise immunity in electrically adverse environments, RC low-pass filters are
provided on the SDA and SCL lines.
9.2.7 I
2
C-bus slave address
Device selection depends on the I
2
C-bus slave address. Two different I
2
C-bus slave
addresses can be used to address the PCA8546 (see Table 24
).
Fig 23. Acknowledgement on the I
2
C-bus
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