M95160-x, M95080-x DC and AC parameters
Doc ID 8028 Rev 11 37/49
Table 26. AC characteristics (M95160-R and M95080-R)
Test conditions specified in Tabl e 1 3 and Tabl e 1 1
Symbol Alt. Parameter Min. Max. Unit
f
C
f
SCK
Clock frequency D.C. 5 MHz
t
SLCH
t
CSS1
S active setup time 60 ns
t
SHCH
t
CSS2
S not active setup time 60 ns
t
SHSL
t
CS
S deselect time 90 ns
t
CHSH
t
CSH
S active hold time 60 ns
t
CHSL
S not active hold time 60 ns
t
CH
(1)
1. t
CH
+ t
CL
must never be lower than the shortest possible clock period, 1/f
C
(max).
t
CLH
Clock high time 80 ns
t
CL
(1)
t
CLL
Clock low time 80 ns
t
CLCH
(2)
2. Value guaranteed by characterization, not 100% tested in production.
t
RC
Clock rise time 2 µs
t
CHCL
(2)
t
FC
Clock fall time 2 µs
t
DVCH
t
DSU
Data in setup time 20 ns
t
CHDX
t
DH
Data in hold time 20 ns
t
HHCH
Clock low hold time after HOLD not active 60 ns
t
HLCH
Clock low hold time after HOLD active 60 ns
t
CLHL
Clock low set-up time before HOLD active 0 0
t
CLHH
Clock low set-up time before HOLD not active 0 0
t
SHQZ
(2)
t
DIS
Output disable time 80 ns
t
CLQV
t
V
Clock low to output valid 80 ns
t
CLQX
t
HO
Output hold time 0 ns
t
QLQH
(2)
t
RO
Output rise time 80 ns
t
QHQL
(2)
t
FO
Output fall time 80 ns
t
HHQV
t
LZ
HOLD high to output valid 80 ns
t
HLQZ
(2)
t
HZ
HOLD low to output high-Z 80 ns
t
W
t
WC
Write time 5 ms
DC and AC parameters M95160-x, M95080-x
38/49 Doc ID 8028 Rev 11
Table 27. AC characteristics (M95160-F)
(1)
1. Preliminary data.
Test conditions specified in Table 12
Symbol Alt. Parameter Min. Max. Unit
f
C
f
SCK
Clock frequency D.C. 3.5 MHz
t
SLCH
t
CSS1
S active setup time 85 ns
t
SHCH
t
CSS2
S not active setup time 85 ns
t
SHSL
t
CS
S deselect time 120 ns
t
CHSH
t
CSH
S active hold time 85 ns
t
CHSL
S not active hold time 85 ns
t
CH
(2)
2. t
CH
+ t
CL
must never be lower than the shortest possible clock period, 1/f
C
(max).
t
CLH
Clock high time 110 ns
t
CL
(1)
t
CLL
Clock low time 110 ns
t
CLCH
(3)
3. Value guaranteed by characterization, not 100% tested in production.
t
RC
Clock rise time 2 µs
t
CHCL
(2)
t
FC
Clock fall time 2 µs
t
DVCH
t
DSU
Data in setup time 30 ns
t
CHDX
t
DH
Data in hold time 30 ns
t
HHCH
Clock low hold time after HOLD not active 85 ns
t
HLCH
Clock low hold time after HOLD active 85 ns
t
CLHL
Clock low set-up time before HOLD active 0 0
t
CLHH
Clock low set-up time before HOLD not active 0 0
t
SHQZ
(2)
t
DIS
Output disable time 120 ns
t
CLQV
t
V
Clock low to output valid 120 ns
t
CLQX
t
HO
Output hold time 0 ns
t
QLQH
(2)
t
RO
Output rise time 100 ns
t
QHQL
(2)
t
FO
Output fall time 100 ns
t
HHQV
t
LZ
HOLD high to output valid 110 ns
t
HLQZ
(2)
t
HZ
HOLD low to output high-Z 110 ns
t
W
t
WC
Write time 5 ms
M95160-x, M95080-x DC and AC parameters
Doc ID 8028 Rev 11 39/49
Figure 15. Serial input timing
Figure 16. Hold timing
C
D
AI01447d
S
MSB IN
Q
tDVCH
High impedance
LSB IN
tSLCH
tCHDX
tCLCH
tSHCH
tSHSL
tCHSHtCHSL
tCH
tCL
tCHCL
C
Q
AI01448c
S
HOLD
tCLHL
tHLCH
tHHCH
tCLHH
tHHQVtHLQZ

M95080-RMB6TG

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
EEPROM 16 Kbit and 8 Kbit
Lifecycle:
New from this manufacturer.
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