TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 19 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
8.6 Color space converter
The color space converter is used to convert input video data from one type to another
color space (RGB to YC
B
C
R
and YC
B
C
R
to RGB). This block can be bypassed and each
coefficient is programmable via the I
2
C-bus register.
8.7 Downsampler
This block works only with YC
B
C
R
input format; these filters downsample the C
B
and C
R
signals by a factor 2. A delay is added on the G/Y channel, which corresponds to the
pipeline delay of the filters, to put the Y channel in phase with the C
B
-C
R
channels.
8.8 Audio input format
The TDA9983B is compatible with HDMI 1.2a (DVD support). The TDA9983B can carry
audio in I
2
S-bus format (one stereo up to four stereo channels) or in S/PDIF format.
S/PDIF or I
2
S-bus format can be selected via the I
2
C-bus. Only one audio format can be
used at a time: either S/PDIF or I
2
S-bus. Table 15 shows the audio port allocation.
8.9 S/PDIF
The audio port AP6 is used for the S/PDIF feature. In this format the TDA9983B supports
2-channel uncompressed PCM data (IEC 60958) layout 0 or compressed bit stream up to
8 multichannels (Dolby Digital, DTS, AC-3, etc.) layout 1. The TDA9983B is able to
recover the original clock from the S/PDIF signal (no need for an external clock). In
addition it can also use an external clock (MCLK) to decode the S/PDIF signal.
8.10 I
2
S-bus
The TDA9983B supports the NXP I
2
S-bus format. There are four I
2
S-bus stereo input
channels (AP1 to AP4), which enable 8 uncompressed audio channels to be carried. The
I
2
S-bus input interface receives an I
2
S-bus signal including serial data, word select and
Y\G
C
B
\R
C
R
\B
C
11
C
12
C
13
C
21
C
22
C
23
C
31
C
32
C
33
G\Y
R\C
B
B\C
R
Oin
G\Y
Oin
R\C
B
Oin
B\C
R
+
×
Oout
Y \G
Oout
C
B
\R
Oout
C
R
\B
+=
Table 15. Audio port configuration
All audio ports are LV-TTL compatible.
Audio port I
2
S-bus and S/PDIF input configuration
AP0 WS (word select)
AP1 I
2
S-bus audio port 0
AP2 I
2
S-bus audio port 1
AP3 I
2
S-bus audio port 2
AP4 I
2
S-bus audio port 3
AP5 MCLK (master clock for S/PDIF)
AP6 S/PDIF input
AP7 AUX (internal test)
ACLK SCK (I
2
S-bus clock)
