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TDA9983BHW/15/C1:5

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P78P79-P81P82-P84P85-P87P88-P90P91-P93P94-P96P97-P99P100-P102P103-P105P106-P108P109-P111P112-P114P115-P117P118-P119
TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 49 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
Table 54. SC_x_PHASE_x registers (address 02h to 04h) bit description
Legend: * = default value
Address Register Bit Symbol Access Value Description
02h SC_DELTA_PHASE_V 7 x W 0* undefined
6 to 0 DELTA_PHASE_V[6:0] W 001 1110* delta phase vertical
03h SC_DELTA_PHASE_H 7 to 5 x W 000* undefined
4 to 0 DELTA_PHASE_H[4:0] W 1 0000* delta phase horizontal
04h SC_START_PHASE_H 7 to 4 x W 0000* undefined
3 to 0 START_PHASE_H[3:0] W 0000* start phase horizontal
Table 55. SC_NPIX_xx registers (address 05h to 08h) bit description
Legend: * = default value
Address Register Bit Symbol Access Value Description
06h SC_NPIX_IN_MSB 7 to 2 x W 0000 00* undefined
1 to 0 NPIX_IN[9:8] W 10* number of input pixels
05h SC_NPIX_IN_LSB 7 to 0 NPIX_IN[7:0] W D0h*
08h SC_NPIX_OUT_MSB 7 to 3 x W 0000 0* undefined
2 to 0 NPIX_OUT[10:8] W 010* number of output pixels
07h SC_NPIX_OUT_LSB 7 to 0 NPIX_OUT[7:0] W D0h*
Table 56. SC_NLINE_xx registers (address 09h to 0Dh) bit description
Legend: * = default value
Address Register Bit Symbol Access Value Description
0Ah SC_NLINE_IN_MSB 7 to 2 x W 0000 00* undefined
1 to 0 NLINE_IN[9:8] W 10* number of input lines
09h SC_NLINE_IN_LSB 7 to 0 NLINE_IN[7:0] W 40h*
0Ch SC_NLINE_OUT_MSB 7 to 2 x W 0000 00* undefined
1 to 0 NLINE_OUT[9:8] W 10* number of output lines
0Bh SC_NLINE_OUT_LSB 7 to 0 NLINE_OUT[7:0] W 40h*
0Dh SC_NLINE_SKIP 7 to 3 x W 0000 0* undefined
2 to 0 NLINE_SKIP[2:0] W 000* number of output lines
skipped: by vertical
scaler
Table 57. SC_x_BUFFILL_xx registers (address 0Eh to 12h) bit description
Legend: * = default value
Address Register Bit Symbol Access Value Description
0Eh SC_SAMPLE_BUFFILL 7 to 0 SAMPLE_BUFFILL_
COMMAND[7:0]
R-sample buffer filling
command: when this address
is read the BUFFILL values are
sampled
10h SC_MAX_BUFFILL_P_1 7 to 4 x R - undefined
3 to 0 MAX_BUFFILL_P[11:8] R - max buffer filling primary:
filling primary video buffer
0Fh SC_MAX_BUFFILL_P_0 7 to 0 MAX_BUFFILL_P[7:0] R -
TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 50 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
12h SC_MAX_BUFFILL_D_1 7 to 4 x R - undefined
3 to 0 MAX_BUFFILL_D[11:8] R - max buffer filling
deinterlaced: filling video
deinterlaced buffer
11h SC_MAX_BUFFILL_D_0 7 to 0 MAX_BUFFILL_D[7:0] R -
Table 57. SC_x_BUFFILL_xx registers (address 0Eh to 12h) bit description
…continued
Legend: * = default value
Address Register Bit Symbol Access Value Description
Table 58. SC_xx_FIFOFILL_xx registers (address 13h to 1Ah) bit description
Legend: * = default value
Address Register Bit Symbol Access Value Description
13h SC_SAMPLE_FIFOFILL 7 to 0 SAMPLE_FIFOFILL_
COMMAND[7:0]
R-sample FIFO filling command:
when this address is read the
FIFOFILL values are sampled
14h SC_MAX_FIFOFILL_PI 7 to 5 x R - undefined
4 to 0 MAX_FIFOFILL_PI[4:0] R - max FIFO filling primary input:
filling primary video input FIFO
15h SC_MIN_FIFOFILL_PO1 7 to 5 x R - undefined
4 to 0 MIN_FIFOFILL_PO1[4:0] R - min FIFO filling primary
output 1: filling primary video
output FIFO#1
16h SC_MIN_FIFOFILL_PO2 7 to 5 x R - undefined
4 to 0 MIN_FIFOFILL_PO2[4:0] R - min FIFO filling primary
output 2: filling primary video
output FIFO#2
17h SC_MIN_FIFOFILL_PO3 7 to 5 x R - undefined
4 to 0 MIN_FIFOFILL_PO3[4:0] R - min FIFO filling primary
output 3: filling primary video
output FIFO#3
18h SC_MIN_FIFOFILL_PO4 7 to 5 x R - undefined
4 to 0 MIN_FIFOFILL_PO4[4:0] R - min FIFO filling primary
output 4: filling primary video
output FIFO#4
19h SC_MAX_FIFOFILL_DI 7 to 5 x R - undefined
4 to 0 MAX_FIFOFILL_DI[4:0] R - max FIFO filling deinterlaced
input: filling deinterlaced video
input FIFO
1Ah SC_MAX_FIFOFILL_DO 7 to 5 x R - undefined
4 to 0 MAX_FIFOFILL_DO[4:0] R - max FIFO filling deinterlaced
output: filling deinterlaced video
output FIFO
TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 51 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
Table 59. SC_VS_LUT_xx registers (address 1Bh to 47h) bit description
Legend: * = default value
Address Register Bit Symbol Access Value Description
1Bh SC_VS_LUT_0 7 to 0 VS_LUT0[7:0] W - vertical scaler LUT 0: external LUT
coefficient[0] for vertical scaler
1Ch SC_VS_LUT_1 7 to 0 VS_LUT1[7:0] W - vertical scaler LUT 1: external LUT
coefficient[1] for vertical scaler
1Dh SC_VS_LUT_2 7 to 0 VS_LUT2[7:0] W - vertical scaler LUT 2: external LUT
coefficient[2] for vertical scaler
1Eh SC_VS_LUT_3 7 to 0 VS_LUT3[7:0] W - vertical scaler LUT 3: external LUT
coefficient[3] for vertical scaler
1Fh SC_VS_LUT_4 7 to 0 VS_LUT4[7:0] W - vertical scaler LUT 4: external LUT
coefficient[4] for vertical scaler
20h SC_VS_LUT_5 7 to 0 VS_LUT5[7:0] W - vertical scaler LUT 5: external LUT
coefficient[5] for vertical scaler
21h SC_VS_LUT_6 7 to 0 VS_LUT6[7:0] W - vertical scaler LUT 6: external LUT
coefficient[6] for vertical scaler
22h SC_VS_LUT_7 7 to 0 VS_LUT7[7:0] W - vertical scaler LUT 7: external LUT
coefficient[7] for vertical scaler
23h SC_VS_LUT_8 7 to 0 VS_LUT8[7:0] W - vertical scaler LUT 8: external LUT
coefficient[8] for vertical scaler
24h SC_VS_LUT_9 7 to 0 VS_LUT9[7:0] W - vertical scaler LUT 9: external LUT
coefficient[9] for vertical scaler
25h SC_VS_LUT_10 7 to 0 VS_LUT10[7:0] W - vertical scaler LUT 10: external LUT
coefficient[10] for vertical scaler
26h SC_VS_LUT_11 7 to 0 VS_LUT11[7:0] W - vertical scaler LUT 11: external LUT
coefficient[11] for vertical scaler
27h SC_VS_LUT_12 7 to 0 VS_LUT12[7:0] W - vertical scaler LUT 12: external LUT
coefficient[12] for vertical scaler
28h SC_VS_LUT_13 7 to 0 VS_LUT13[7:0] W - vertical scaler LUT 13: external LUT
coefficient[13] for vertical scaler
29h SC_VS_LUT_14 7 to 0 VS_LUT14[7:0] W - vertical scaler LUT 14: external LUT
coefficient[14] for vertical scaler
2Ah SC_VS_LUT_15 7 to 0 VS_LUT15[7:0] W - vertical scaler LUT 15: external LUT
coefficient[15] for vertical scaler
2Bh SC_VS_LUT_16 7 to 0 VS_LUT16[7:0] W - vertical scaler LUT 16: external LUT
coefficient[16] for vertical scaler
2Ch SC_VS_LUT_17 7 to 0 VS_LUT17[7:0] W - vertical scaler LUT 17: external LUT
coefficient[17] for vertical scaler
2Dh SC_VS_LUT_18 7 to 0 VS_LUT18[7:0] W - vertical scaler LUT 18: external LUT
coefficient[18] for vertical scaler
2Eh SC_VS_LUT_19 7 to 0 VS_LUT19[7:0] W - vertical scaler LUT 19: external LUT
coefficient[19] for vertical scaler
2Fh SC_VS_LUT_20 7 to 0 VS_LUT20[7:0] W - vertical scaler LUT 20: external LUT
coefficient[20] for vertical scaler
30h SC_VS_LUT_21 7 to 0 VS_LUT21[7:0] W - vertical scaler LUT 21: external LUT
coefficient[21] for vertical scaler
31h SC_VS_LUT_22 7 to 0 VS_LUT22[7:0] W - vertical scaler LUT 22: external LUT
coefficient[22] for vertical scaler
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P78P79-P81P82-P84P85-P87P88-P90P91-P93P94-P96P97-P99P100-P102P103-P105P106-P108P109-P111P112-P114P115-P117P118-P119

TDA9983BHW/15/C1:5

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IC HDMI TX 150MHZ 80-HTQFP
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