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TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 46 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
SC_VS_LUT_36 3Fh W VS_LUT36[7:0] XXXX XXXX
SC_VS_LUT_37 40h W VS_LUT37[7:0] XXXX XXXX
SC_VS_LUT_38 41h W VS_LUT38[7:0] XXXX XXXX
SC_VS_LUT_39 42h W VS_LUT39[7:0] XXXX XXXX
SC_VS_LUT_40 43h W VS_LUT40[7:0] XXXX XXXX
SC_VS_LUT_41 44h W VS_LUT41[7:0] XXXX XXXX
SC_VS_LUT_42 45h W VS_LUT42[7:0] XXXX XXXX
SC_VS_LUT_43 46h W VS_LUT43[7:0] XXXX XXXX
SC_VS_LUT_44 47h W VS_LUT44[7:0] XXXX XXXX
Not used 48h - - 0000 0000
::: : :
Not used 9Fh - - 0000 0000
VIDFORMAT A0h W x xxxx VIDFORMAT[2:0] 0000 0000
REFPIX_MSB A1h W x xxxxxPRESET_PIX[9:8] 0000 0000
REFPIX_LSB A2h W PRESET_PIX[7:0] 0000 0001
REFLINE_MSB A3h W x xxxxxPRESET_LINE[9:8] 0000 0000
REFLINE_LSB A4h W PRESET_LINE[7:0] 0000 0001
NPIX_MSB A5h W x xxxxx NPIX[9:8] 0000 0000
NPIX_LSB A6h W NPIX[7:0] 0000 0000
NLINE_MSB A7h W x xxxxx NLINE[9:8] 0000 0000
NLINE_LSB A8h W NLINE[7:0] 0000 0000
Not used A9h - - 0000 0000
::: : :
Not used BCh - - 0000 0000
VWIN_START_1_MSB BDh W x xxxxxVWIN_START_1[9:8] 0000 0000
VWIN_START_1_LSB BEh W VWIN_START_1[7:0] 0000 0000
VWIN_END_1_MSB BFh W x xxxxxVWIN_END_1[9:8] 0000 0000
VWIN_END_1_LSB C0h W VWIN_END_1[7:0] 0000 0000
VWIN_START_2_MSB C1h W x xxxxxVWIN_START_2[9:8] 0000 0000
VWIN_START_2_LSB C2h W VWIN_START_2[7:0] 0000 0000
VWIN_END_2_MSB C3h W x xxxxxVWIN_END_2[9:8] 0000 0000
VWIN_END_2_LSB C4h W VWIN_END_2[7:0] 0000 0000
Table 51. I
2
C-bus registers of memory page 01h
[1]
…continued
Register Sub
addr
R/W Bit Default
value
7 (MSB) 6 5 4 3 2 1 0 (LSB)
