TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 79 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
9.6.5 MPEG source InfoFrame registers
Below is an example of use. Please refer to
EIA/CEA-861B specification
and
HDMI 1.2a
specification
for the correct definition of data bytes.
9Bh AUD_IF_BYTE24 7 to 0 AUD_IF_BYTE24[7:0] R/W 00h* byte 24: reserved (shall be zero)
9Ch AUD_IF_BYTE25 7 to 0 AUD_IF_BYTE25[7:0] R/W 00h* byte 25: reserved (shall be zero)
9Dh AUD_IF_BYTE26 7 to 0 AUD_IF_BYTE26[7:0] R/W 00h* byte 26: reserved (shall be zero)
9Eh AUD_IF_BYTE27 7 to 0 AUD_IF_BYTE27[7:0] R/W 00h* byte 27: reserved (shall be zero)
Table 87. AUD_IF_xx registers (address 80h to 9Eh) bit description
…continued
Legend: * = default value
Address Register Bit Symbol Access Value Description
Table 88. MPS_IF_xx registers (address A0h to BEh) bit description
Legend: * = default value
Address Register Bit Symbol Access Value Description
A0h MPS_IF_TYPE 7 to 0 MPS_IF_TYPE[7:0] R/W 85h* MPEG source InfoFrame packet
type: gives the packet type of the
MPEG source InfoFrame packet
(80h + InfoFrame type code as per
EIA/CEA-861B
)
A1h MPS_IF_VERSION 7 to 0 MPS_IF_VERSION[7:0] R/W 00h* MPEG source InfoFrame
version: gives the version number
of the MPEG source InfoFrame
A2h MPS_IF_LENGTH 7 to 5 x R/W 000* reserved (shall be zero)
4 to 0 MPS_IF_LENGTH[4:0] R/W 0 0000* MPEG source InfoFrame length:
gives the number of data bytes for
the MPEG source InfoFrame; this
length does not include the
checksum
A3h MPS_IF_
CHECKSUM
7 to 0 MPS_IF_
CHECKSUM[7:0]
R/W 00h* MPEG source InfoFrame
checksum: shall be calculated
such that a byte-wide sum of all
three bytes of the packet header
and all valid bytes of the MPEG
source InfoFrame packet contents
(determined by InfoFrame length)
plus the checksum itself equals 0
MPEG source InfoFrame MPEG
bit rate (Hz)
A4h MPS_IF_BYTE1 7 to 0 MPS_IF_MB0[7:0] R/W 00h* MB#0 (lower byte)
A5h MPS_IF_BYTE2 7 to 0 MPS_IF_MB1[7:0] R/W 00h* MB#1 (medium byte)
A6h MPS_IF_BYTE3 7 to 0 MPS_IF_MB2[7:0] R/W 00h* MB#2 (medium byte)
A7h MPS_IF_BYTE4 7 to 0 MPS_IF_MB3[7:0] R/W 00h* MB#3 (upper byte)
TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 80 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
A8h MPS_IF_BYTE5 7 to 5 reserved R/W 000* reserved
4 MPS_IF_FR0 R/W MPEG source InfoFrame field
repeat 0: for 3 : 2 pull-down
0* new field (picture)
1 repeated field
3 to 2 reserved R/W 00* reserved
1 to 0 MPS_IF_MF[1:0] R/W MPEG source InfoFrame MPEG
frame: MPEG frame
00* unknown (no data)
01 I picture
10 B picture
11 P picture
MPEG source InfoFrame byte x:
x = 6 to 27
A9h MPS_IF_BYTE6 7 to 0 MPS_IF_BYTE6[7:0] R/W 00h* byte 6: reserved (shall be zero)
AAh MPS_IF_BYTE7 6 to 0 MPS_IF_BYTE7[7:0] R/W 000 0000* byte 7: reserved (shall be zero)
ABh MPS_IF_BYTE8 6 to 0 MPS_IF_BYTE8[7:0] R/W 000 0000* byte 8: reserved (shall be zero)
ACh MPS_IF_BYTE9 6 to 0 MPS_IF_BYTE9[7:0] R/W 000 0000* byte 9: reserved (shall be zero)
ADh MPS_IF_BYTE10 7 to 0 MPS_IF_BYTE10[7:0] R/W 00h* byte 10: reserved (shall be zero)
AEh MPS_IF_BYTE11 7 to 0 MPS_IF_BYTE11[7:0] R/W 00h* byte 11: reserved
AFh MPS_IF_BYTE12 7 to 0 MPS_IF_BYTE12[7:0] R/W 00h* byte 12: reserved
B0h MPS_IF_BYTE13 7 to 0 MPS_IF_BYTE13[7:0] R/W 00h* byte 13: reserved
B1h MPS_IF_BYTE14 7 to 0 MPS_IF_BYTE14[7:0] R/W 00h* byte 14: reserved
B2h MPS_IF_BYTE15 7 to 0 MPS_IF_BYTE15[7:0] R/W 00h* byte 15: reserved
B3h MPS_IF_BYTE16 7 to 0 MPS_IF_BYTE16[7:0] R/W 00h* byte 16: reserved
B4h MPS_IF_BYTE17 7 to 0 MPS_IF_BYTE17[7:0] R/W 00h* byte 17: reserved
B5h MPS_IF_BYTE18 7 to 0 MPS_IF_BYTE18[7:0] R/W 00h* byte 18: reserved
B6h MPS_IF_BYTE19 7 to 0 MPS_IF_BYTE19[7:0] R/W 00h* byte 19: reserved
B7h MPS_IF_BYTE20 7 to 0 MPS_IF_BYTE20[7:0] R/W 00h* byte 20: reserved
B8h MPS_IF_BYTE21 7 to 0 MPS_IF_BYTE21[7:0] R/W 00h* byte 21: reserved
B9h MPS_IF_BYTE22 7 to 0 MPS_IF_BYTE22[7:0] R/W 00h* byte 22: reserved
BAh MPS_IF_BYTE23 7 to 0 MPS_IF_BYTE23[7:0] R/W 00h* byte 23: reserved
BBh MPS_IF_BYTE24 7 to 0 MPS_IF_BYTE24[7:0] R/W 00h* byte 24: reserved
BCh MPS_IF_BYTE25 7 to 0 MPS_IF_BYTE25[7:0] R/W 00h* byte 25: reserved
BDh MPS_IF_BYTE26 7 to 0 MPS_IF_BYTE26[7:0] R/W 00h* byte 26: reserved
BEh MPS_IF_BYTE27 7 to 0 MPS_IF_BYTE27[7:0] R/W 00h* byte 27: reserved
Table 88. MPS_IF_xx registers (address A0h to BEh) bit description
…continued
Legend: * = default value
Address Register Bit Symbol Access Value Description
TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 81 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
9.6.6 Current page address register
9.7 Audio settings and content info packets page register definitions
The current page address for the audio settings and content info packets page is 11h.
The configuration of the registers for this page is given in Table 90.
Table 89. CURPAGE_ADR register (address FFh) bit description
Legend: * = default value
Bit Symbol Access Value Description
7 to 0 CURPAGE_ADR[7:0] W 00h* current page address: selects the current
memory page

TDA9983BHW/8/C1,51

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC HDMI TX 81MHZ 80-HTQFP
Lifecycle:
New from this manufacturer.
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