xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx
xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 85 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
ISRC2_PB27 5Eh R/W ISRC2_PB_BYTE_27[7:0] 0000 0000
Not used 5Fh - - 0000 0000
ACP_PACKET_TYPE 60h R/W ACP_PACKET_TYPE[7:0] 0000 0100
ACP_TYPE 61h R/W ACP_TYPE[7:0] 0000 0000
ACP_RSVD 62h R/W ACP_RSVD[7:0] 0000 0000
ACP_PB0 63h R/W ACP_PB_BYTE_0[7:0] 0000 0000
ACP_PB1 64h R/W ACP_PB_BYTE_1[7:0] 0000 0000
ACP_PB2 65h R/W ACP_PB_BYTE_2[7:0] 0000 0000
ACP_PB3 66h R/W ACP_PB_BYTE_3[7:0] 0000 0000
ACP_PB4 67h R/W ACP_PB_BYTE_4[7:0] 0000 0000
ACP_PB5 68h R/W ACP_PB_BYTE_5[7:0] 0000 0000
ACP_PB6 69h R/W ACP_PB_BYTE_6[7:0] 0000 0000
ACP_PB7 6Ah R/W ACP_PB_BYTE_7[7:0] 0000 0000
ACP_PB8 6Bh R/W ACP_PB_BYTE_8[7:0] 0000 0000
ACP_PB9 6Ch R/W ACP_PB_BYTE_9[7:0] 0000 0000
ACP_PB10 6Dh R/W ACP_PB_BYTE_10[7:0] 0000 0000
ACP_PB11 6Eh R/W ACP_PB_BYTE_11[7:0] 0000 0000
ACP_PB12 6Fh R/W ACP_PB_BYTE_12[7:0] 0000 0000
ACP_PB13 70h R/W ACP_PB_BYTE_13[7:0] 0000 0000
ACP_PB14 71h R/W ACP_PB_BYTE_14[7:0] 0000 0000
ACP_PB15 72h R/W ACP_PB_BYTE_15[7:0] 0000 0000
ACP_PB16 73h R/W ACP_PB_BYTE_16[7:0] 0000 0000
ACP_PB17 74h R/W ACP_PB_BYTE_17[7:0] 0000 0000
ACP_PB18 75h R/W ACP_PB_BYTE_18[7:0] 0000 0000
ACP_PB19 76h R/W ACP_PB_BYTE_19[7:0] 0000 0000
ACP_PB20 77h R/W ACP_PB_BYTE_20[7:0] 0000 0000
ACP_PB21 78h R/W ACP_PB_BYTE_21[7:0] 0000 0000
ACP_PB22 79h R/W ACP_PB_BYTE_22[7:0] 0000 0000
ACP_PB23 7Ah R/W ACP_PB_BYTE_23[7:0] 0000 0000
ACP_PB24 7Bh R/W ACP_PB_BYTE_24[7:0] 0000 0000
ACP_PB25 7Ch R/W ACP_PB_BYTE_25[7:0] 0000 0000
ACP_PB26 7Dh R/W ACP_PB_BYTE_26[7:0] 0000 0000
Table 90. I
2
C-bus registers of memory page 11h
[1]
…continued
Register Sub
addr
R/W Bit Default value
7 (MSB) 6 5 4 3 2 1 0 (LSB)
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx
xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 86 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
[1] R: reading register
W: writing register
x: bit must be set to default value for proper operation
-: not used
ACP_PB27 7Eh R/W ACP_PB_BYTE_27[7:0] 0000 0000
Not used 7Fh - - 0000 0000
::: : :
Not used FEh - - 0000 0000
CURPAGE_ADR FFh W CURPAGE_ADR[7:0] 0000 0000
Table 90. I
2
C-bus registers of memory page 11h
[1]
…continued
Register Sub
addr
R/W Bit Default value
7 (MSB) 6 5 4 3 2 1 0 (LSB)
TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 87 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
9.7.1 Audio input processor control registers
Table 91. AIP_CNTRL_0 register (address 00h) bit description
Legend: * = default value
Bit Symbol Access Value Description
7 x R/W 0* undefined
6 RST_CTS R/W reset CTS
0* no specific action
1 reset CTS generation (soft reset)
5 ACR_MAN R/W audio clock regeneration manual
0* automatic audio clock regeneration time
stamp generation
1 manual audio clock regeneration time stamp
generation
4 to 3 x R/W 00* undefined
2 LAYOUT R/W layout
0* set layout 0
1 set layout 1
1 SWAP R/W 0* swap: for internal use
0 RST_FIFO R/W reset FIFO
0* no specific action
1 reset audio FIFO
Table 92. CA_I2S register (address 01h) bit description
Legend: * = default value
Bit Symbol Access Value Description
7 to 5 x R/W 000* undefined
4 to 0 CA_I2S[4:0] R/W 0 0000*
channel allocation I
2
S-bus port: layout 1
Table 93. LATENCY_RD register (address 04h) bit description
Legend: * = default value
Bit Symbol Access Value Description
7 to 0 LATENCY_RD[7:0] R/W 04h* latency read: latency value in audio FIFO
Table 94. ACR_CTS_x registers (address 05h to 07h) bit description
Legend: * = default value
Address Register Bit Symbol Access Value Description
07h ACR_CTS_2 7 to 4 x R/W 0000* undefined
3 to 0 CTS[19:16] R/W 0000* CTS: audio clock recovery CTS value for
manual CTS settings
06h ACR_CTS_1 7 to 0 CTS[15:8] R/W 69h*
05h ACR_CTS_0 7 to 0 CTS[7:0] R/W 78h*

TDA9983BHW/8/C1,51

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC HDMI TX 81MHZ 80-HTQFP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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