TDA9983B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 20 May 2008 7 of 119
NXP Semiconductors
TDA9983B
150 MHz pixel rate HDMI transmitter
I2C_SCL 43 I I
2
C-bus clock input of device (open drain); must be connected
to a pull-up resistor; 5 V tolerant
I2C_SDA 44 I/O I
2
C-bus data input/output of device; open drain; must be
connected to a pull-up resistor; 5 V tolerant
V
DDC(1V8)
45 P supply voltage for digital core (1.8 V)
V
SSA(PLL_1V8)
46 G analog ground reference for PLL
V
SSD
47 G ground for input ports
V
DDD(3V3)
48 P supply voltage for input ports (3.3 V)
VPC[7] 49 I video port C input bit 7
VPC[6] 50 I video port C input bit 6
VPC[5] 51 I video port C input bit 5
VPC[4] 52 I video port C input bit 4
VPC[3] 53 I video port C input bit 3
VPC[2] 54 I video port C input bit 2
VPC[1] 55 I video port C input bit 1
VPC[0] 56 I video port C input bit 0
VPB[7] 57 I video port B input bit 7
VPB[6] 58 I video port B input bit 6
V
DDC(1V8)
59 P supply voltage for digital core (1.8 V)
V
SSC
60 G ground for digital core
VPB[5] 61 I video port B input bit 5
VPB[4] 62 I video port B input bit 4
VPB[3] 63 I video port B input bit 3
VPB[2] 64 I video port B input bit 2
VPB[1] 65 I video port B input bit 1
VCLK 66 I video pixel clock input
VPB[0] 67 I video port B input bit 0
VPA[7] 68 I video port A input bit 7
VPA[6] 69 I video port A input bit 6
VPA[5] 70 I video port A input bit 5
V
DDD(3V3)
71 P supply voltage for input ports (3.3 V)
V
SSD
72 G ground for input ports
V
SSC
73 G ground for digital core
V
DDC(1V8)
74 P supply voltage for digital core (1.8 V)
VPA[4] 75 I video port A input bit 4
VPA[3] 76 I video port A input bit 3
VPA[2] 77 I video port A input bit 2
VPA[1] 78 I video port A input bit 1
VPA[0] 79 I video port A input bit 0
DE/FREF 80 I video data enable input or field reference input
Exposed die pad central G exposed die pad; must be connected to the ground of the
HDMI transmitter (V
SSH
)
Table 4. Pin description
…continued
Symbol Pin Type
[1]
Description
