34
INDUSTRIAL TEMPERATURE RANGE
IDT5V9885T
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
RAM (PROGRAMMING REGISTER) TABLES
ADDR 76543210
Register
Hex Value
7 6543210
0x40 00000000 00
0x41 00000000 00
0x42 00000000 00
0x43 00000000 00
0x44
0000 0000 00
0x45 00000000 00
0x46
0000 0000 00
0x47 00000000 00
0x48
0000 0000 00
0x49 00000000 00
0x4A 00000000 00
0x4B 00000000 00
0x4C 00 0 000 00 00 INV2
0x4D
10111011 BB
0x4E 00 0 00000 00
0x4F
00 0 00000 00
0x50 00 0 000 00 00 INV3
0x51
10111011 BB
0x52 00 0 000 00 00
0x53 00 0 000 00 00
BIT # BIT #
Q2[1:0]_CONFIG1
D2 [7: 0]_C O NF IG1
Q2[9:2]_CONFIG0
D2 [7: 0]_C O NF IG2
PM2[1:0]_CONFIG1 PM2[1:0] _CONFIG0
SLEW 2[1:0]
N2[11:8]_CONFIG1
PM3[1:0]_CONFIG1 Q3[1:0]_CONFIG0 PM3[1:0]_CONFIG0
Q3[9:2]_CONFIG1
N2[11:8]_CONFIG3
N2[11:8]_CONFIG2
Q2[9:2]_CONFIG1
OEM2[1:0]
Q3[9:2]_CONFIG0
SLEW 3[1:0]OEM3[1:0]
N2[11:8]_CONFIG0
N2 [7: 0]_C O NF IG0
D2 [7: 0]_C O NF IG3
N2 [7: 0]_C O NF IG3
D2 [7: 0]_C O NF IG0
N2 [7: 0]_C O NF IG2
N2 [7: 0]_C O NF IG1
Q2[1:0]_CONFIG0
Q3[1:0]_CONFIG1
0x54 00001100 0C INV4_1 INV4_0
0x55 10111011 BB
0x56 00 0 000 00 00
0x57 00 0 000 00 00
0x58
00001100 0C INV5_1 INV5_0
0x59 10111011 BB
0x5A
00 0 00000 00
0x5B 00 0 000 00 00
0x5C
0000 0011 03 INV6
0x5D 1 0111011 BB
0x5E 00 0 00000 00
0x5F 00 0 000 00 00
Q5[9:2]_CONFIG1
SLEW 6[1:0]
Q6[9:2]_CONFIG1
PM6[1:0] _CONFIG0PM6[1:0]_CONFIG1Q6[1:0]_CONFIG1
Q5[1:0]_CONFIG0
Q6[9:2]_CONFIG0
OEM6[1:0]
PM5[1:0]_CONFIG1 PM5[1:0] _CONFIG0
Q5[9:2]_CONFIG0
Q5[1:0]_CONFIG1
Q6[1:0]_CONFIG0
SLEW 5[1:0]OEM5[1:0]
Q4[9:2]_CONFIG0
LVL4[1:0]
LVL5[1:0]
Q4[9:2]_CONFIG1
PM4[1:0]_CONFIG1
SLEW 4[1:0]
Q4[1:0]_CONFIG0
OEM4[1:0]
Q4[1:0]_CONFIG1 PM4[1:0]_CONFIG0
DES CRIPTION
P LL2 I NPUT DIVIDER D2 SE TTING
Configuring Output OUT3
IN V3=Output Inversion for OUT3 ("0"= Non-Invert (Default), "1"=Invert);
S LEW3=Slew Rate Settings for OUT3 output ("00"= 2.75V/ns (Def ault), "01"=2V/ns, "10"=1.25V/ns, " 11"=0.7V/ns);
INVx PMx OEMx Qx SLEWx
Configuring Output OUT2
IN V2=Output Inversion for OUT2 ("0"= Non-Invert (Default), "1"=Invert);
S LEW2=Slew Rate Settings for OUT2 output ("00"= 2.75V/ns (Def ault), "01"=2V/ns, "10"=1.25V/ns, " 11"=0.7V/ns);
INV5_1=Output Inversion for /OUT5 ("0"= Invert, "1"=Non-Invert (Default));
INV5_0=Output Inversion for OUT5 ("0"= I nvert, "1"=Non-Invert (Default));
S LEW5=Slew rate s ettings for OUT5 output ("00"= 2.75V/ns (Default), "01"=2V/ns, "10"=1.25V/ns, "11"=0.7V/ns);
OE M5= Output Enable Mode for OUT5 output, when used with OE5 bit and SHUTDOWN/OE pin ("0x" = Tri-state (D efault), "10"=Park
Low, "11"=Park High);
LV L5=Output IO Stan dard Selection, ("00"=LVTTL (Default), "01"=LVDS, "10"=LV PECL, "11"=Reserved);
Q5[x:x]=Output Divider "Q5" Values (Default value is '2') - Support 2 output configurations when used in MFC mode;
P M5[x:x]=Divide M ode, ("00"=Divider Disabled;"01" =Divide by '1';"10"=Divide by 2; "11"=Divide by (Q+2) (Default));
(Note: To enable OUT5, PM5 register bit values for both CONFIG0 and CONFIG1 configurations must be non-zero.)
PLL2 MULTIPLIER SETTING
Total Multiplier Value
Configuring Output OU T5
IN V5_1=Output Inversion for /OUT5 ("0"= Invert, " 1"=Non-Invert (Default));
IN V5_0=Output Inversion for OUT5 ("0"= Invert, "1"=Non-Invert (Default));
When using LVPECL or LVDS outputs, SLE W5 must be set to '00'.
Configuring Output OU T4
IN V4_1=Output Inversion for /OUT4 ("0"= Invert , "1" =Non-Invert (Default));
IN V4_0=Output Inversion for OUT4 ("0"= Invert , "1"=Non-Invert (Default));
35
INDUSTRIAL TEMPERATURE RANGE
IDT5V9885T
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
0x60 00000000 00
0x61 00000000 00 DITH0 X2_0
0x62
00000000 00
0x63 00000000 00
0x64
00000000 00
0x65 00000000 00
0x66 00000000 00
0x67 00000000 00
0x68 00000000 00
0x69 00000000 00 DITH1 X2_1
0x6A 00000000 00
0x6B 00000000 00
0x6C 00000000 00
0x6D 00000000 00
0x6E 00000000 00
0x6F 00000000 00
SD0[3:0][0]
SS_OFFSET1[5:0]
SD0[3:0][11]
SD0[3:0][1]
SD0[3:0][10]
SD0[3:0][3] SD0[3:0][2]
SD0[3:0][5]
SD0[3:0][6]
SD1[3:0][3]
NSSC0[3:0]TSSC0[3:0]
SD1[3:0][1]
TSSC1[3:0] NSSC1[3:0]
SD1[3:0][10]
SD1[3:0][9]
SD1[3:0][2]
SD0[3:0][4]
SD1[3:0][7]
SD0[3:0][7]
SD0[3:0][9]
SS_OFFSET0[5:0]
SD1[3:0][0]
SD0[3:0][8]
SD1[3:0][4]SD1[3:0][5]
SD1[3:0][8]
SD1[3:0][11]
SD1[3:0][6]
SPREAD SPRECTRUM SETTINGS FOR PLL0
SS_OFFSET0=SS Fractional Offset/ First Sample (Unsigned);
TSSC0=# of PFD Cycles Per SS Cycle Step, TSSC="0000" for SSC off (Default);
NSSC0=# of SS Samples to Use from SS Memory (Default is "0");
DITH0=LSB DITHER on
Σ
, ("1"=dither on, "0"=off (Default));
X2_0=
ΣΔ
output x2, ("1"=x2, "0"=normal (Default));
SD0=Delta-encoded samples (unsigned); Waveform start with SS_OFFSET0, then SS_OFFSET0+SD0[0], etc. (Default is "0");
SPREAD SPRECTRUM SETTINGS FOR PLL1
SS_OFFSET1=SS Fractional Offset/ First Sample (Unsigned);
TSSC1=# of PFD Cycles Per SS Cycle Step, TSSC="0000" for SSC off (Default);
NSSC1=# of SS Samples to Use from SS Memory (Default is "0");
DITH1=LSB DITHER on ΣΔ, ("1"=dither on, "0"=off (Default));
X2_1=
ΣΔ
output x2, ("1"=x2, "0"=off (Default));
SD1=Delta-encoded samples (unsigned); Waveform start with SS_OFFSET1, then SS_OFFSET1+SD1[0], etc. (Default is "0");
RAM (PROGRAMMING REGISTER) TABLES
ADDR 76543210
Default
Register
Hex Value
7 6543210
BIT #
BIT #
(Default Settings)
DESCRIPTION
0x70
0x71
0x72
0x73
0x74
0x75
0x76
0x77
0x78
0x79
0x7A
0x7B
0x7C
0x7D
0x7E
0x7F
0x80
0x81 CERR
CRC error in EEPROM
CERR = CRC error bit indicator ("1`" = CRC error) Read-Only
No Registers Exist
36
INDUSTRIAL TEMPERATURE RANGE
IDT5V9885T
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
Package Outline and Package Dimensions (32-pin TQFP)

5V9885TPFGI8

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products SPREAD SPECTRUM PROG . CLK
Lifecycle:
New from this manufacturer.
Delivery:
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