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P89CV51RD2FA,512

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P76
P89CV51RB2_RC2_RD2_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 25 August 2009 58 of 76
NXP Semiconductors
P89CV51RB2/RC2/RD2
80C51 with 1 kB RAM, SPI
6.13.1.1 Clock control register (CKCON)
By default, the device runs at twelve clock cycles per machine cycle (12-clock mode). The
device may be run at 6 clock cycles per machine cycle (6-clock mode) by programming of
either a non-volatile bit (FX2) or an SFR bit (X2); see Table 52 “Clock modes”. If the FX2
non-volatile bit is programmed, the device will run in 6-clock mode and the X2 SFR bit has
no effect. If the FX2 bit is erased, then the clock mode is controlled by the X2 SFR bit.
Table 50. CKCON - Clock control register (address 8FH) bit allocation
Not bit addressable; reset value 00H.
Bit 7 6 5 4 3 2 1 0
Symbol SPIX2 WDX2 PCAX2 SIX2 T2X2 T1X2 T0X2 X2
Table 51. CKCON - Clock control register (address 8FH) bit description
Bit Symbol Description
7 SPIX2 SPI clock; 0 = 6 clock cycles for each SPI clock cycle;
1 = 12 clock cycles
6 WDX2 Watchdog clock; 0 = 6 clock cycles for each WDT clock cycle;
1 = 12 clock cycles
5 PCAX2 PCA clock; 0 = 6 clock cycles for each PCA clock cycle;
1 = 12 clock cycles
4 SIX2 UART clock; 0 = 6 clock cycles for each UART clock cycle;
1 = 12 clock cycles
3 T2X2 Timer 2 clock; 0 = 6 clock cycles for each Timer 2 clock cycle;
1 = 12 clock cycles
2 T1X2 Timer 1 clock; 0 = 6 clock cycles for each Timer 1 clock cycle;
1 = 12 clock cycles
1 T0X2 Timer 0 clock; 0 = 6 clock cycles for each Timer 0 clock cycle;
1 = 12 clock cycles
0 X2 CPU clock; 0 = 12 clock cycles for each machine cycle;
1 = 6 clock cycles
Table 52. Clock modes
FX2 clock mode bit X2 bit CPU clock mode Peripheral clock
mode bit (e.g. T0X2)
Mode
erased 0 12-clock (default) X 12-clock (default)
1 6-clock 0 6-clock
1 12-clock
programmed X 6-clock 0 6-clock
1 12-clock
P89CV51RB2_RC2_RD2_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 25 August 2009 59 of 76
NXP Semiconductors
P89CV51RB2/RC2/RD2
80C51 with 1 kB RAM, SPI
7. Limiting values
8. Static characteristics
Table 53. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Parameters are valid over operating temperature
range unless otherwise specified; all voltages are with respect to V
SS
unless otherwise noted.
Symbol Parameter Conditions Min Max Unit
T
amb(bias)
bias ambient temperature −55 +125 °C
T
stg
storage temperature −65 +150 °C
V
I
input voltage on EA pin to V
SS
−0.5 +14 V
V
n
voltage on any other pin except V
SS
; with respect to
V
DD
−0.5 V
DD
+ 0.5 V
I
OL(I/O)
LOW-level output current per
input/output pin
-15mA
P
tot(pack)
total power dissipation (per package) based on package heat
transfer, not device power
consumption
- 1.5 W
Table 54. Static characteristics
T
amb
=
−
40
°
C to +85
°
C; V
DD
= 4.5 V to 5.5 V; V
SS
=0V.
Symbol Parameter Conditions Min Typ Max Unit
n
endu(fl)
endurance of flash memory JEDEC Standard A117
[1]
10000 - - cycles
t
ret(fl)
flash memory retention time JEDEC Standard A103
[1]
100 - - years
I
latch
I/O latch-up current JEDEC Standard 78
[1]
100 + I
DD
-- mA
V
th(HL)
HIGH-LOW threshold
voltage
−0.5 - +0.2V
DD
− 0.1 V
V
th(LH)
LOW-HIGH threshold
voltage
except XTAL1, RST 0.2V
DD
+ 0.9 - V
DD
+ 0.5 V
V
OL
LOW-level output voltage V
DD
= 4.5 V;
except
PSEN, ALE
[2][3][4]
I
OL
= 1.6 mA - - 0.4 V
V
DD
= 4.5 V; ALE, PSEN
I
OL
= 3.2 mA - - 0.45 V
V
OH
HIGH-level output voltage V
DD
= 4.5 V;
ports 1, 2, 3, 4
[5]
I
OH
= −30 µAV
DD
− 0.7 - - V
V
DD
= 4.5 V; port 0 in
External bus mode, ALE,
PSEN
I
OH
= −3.2 mA V
DD
− 0.7 - - V
I
IL
LOW-level input current V
I
= 0.4 V; ports 1, 2, 3, 4 −1-−75 µA
I
THL
HIGH-LOW transition
current
V
I
= 2 V; ports 1, 2, 3, 4
[6]
--−650 µA
I
LI
input leakage current 0.45 V < V
I
<V
DD
− 0.3 V;
port 0
--±10 µA
0V<V
I
<6V - - 10 µA
P89CV51RB2_RC2_RD2_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 25 August 2009 60 of 76
NXP Semiconductors
P89CV51RB2/RC2/RD2
80C51 with 1 kB RAM, SPI
[1] This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
[2] Under steady state (non-transient) conditions, I
OL
must be externally limited as follows:
a) Maximum I
OL
per 8-bit port: 26 mA
b) Maximum I
OL
total for all outputs: 71 mA
c) If I
OL
exceeds the test condition, V
OH
may exceed the related specification. Pins are not guaranteed to sink current greater than the
listed test conditions.
[3] Capacitive loading on Ports 0 and 2 may cause spurious noise to be superimposed on the V
OL
of ALE and Ports 1 and 3. The noise is
due to external bus capacitance discharging into the Port 0 and 2 pins when the pins make 1-to-0 transitions during bus operations. In
the worst cases (capacitive loading > 100 pF), the noise pulse on the ALE pin may exceed 0.8 V. In such cases, it may be desirable to
qualify ALE with a Schmitt trigger, or use an address latch with a Schmitt trigger STROBE input.
[4] Load capacitance for Port 0, ALE and PSEN = 100 pF, load capacitance for all other outputs = 80 pF.
[5] Capacitive loading on Ports 0 and 2 may cause the V
OH
on ALE and PSEN to momentarily fall below the V
DD
− 0.7 V specification when
the address bits are stabilizing.
[6] Pins of Ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when V
I
is approximately 2 V.
[7] Pin capacitance is characterized but not tested. Capacitance on pin EA = 25 pF (max.).
R
pd
pull-down resistance on pin RST 40 - 225 kΩ
C
iss
input capacitance 1 MHz; T
amb
=25°C;
V
I
=0V
[7]
- - 15 pF
I
DD(oper)
operating supply current f
osc
= 12 MHz - - 11.5 mA
f
osc
= 40 MHz - - 50 mA
Programming and erase
mode
- - 70 mA
I
DD(idle)
Idle mode supply current f
osc
= 12 MHz - - 8.5 mA
f
osc
= 40 MHz - - 42 mA
I
DD(pd)
Power-down mode supply
current
minimum V
DD
= 4.5 V - - 90 µA
Table 54. Static characteristics
…continued
T
amb
=
−
40
°
C to +85
°
C; V
DD
= 4.5 V to 5.5 V; V
SS
=0V.
Symbol Parameter Conditions Min Typ Max Unit
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P76

P89CV51RD2FA,512

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Buy P89CV51RD2FA,512
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 64KB FLASH 44PLCC
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