LTC6803-2/LTC6803-4
16
680324fa
OPERATION
ADC REGISTER CLEAR COMMAND
The clear command can be used to clear the cell voltage
registers and temperature registers. The clear command
will set all registers to 0xFFF. This command is used to
make sure conversions are being made. When cell volt-
ages are stable, ADC results could stay the same. If a start
ADC conversion command is sent to the LTC6803 but the
PEC fails to match then the command is ignored and the
voltage register contents also will not change. Sending a
clear command then reading back register contents is a
way to make sure LTC6803 is accepting commands and
performing new measurements. The clear command takes
1ms to execute.
ADC CONVERTER SELF TEST
Two self-test commands can be used to verify the func-
tionality of the digital portions of the ADC. The self tests
also verify the cell voltage registers and temperature
monitoring registers. During these self tests a test signal
is applied to the ADC. If the circuitry is working properly all
cell voltage and temperature registers will contain 0x555
or 0xAAA. The time required for the self-test function is
the same as required to measure all cell voltages or all
temperature sensors.
MULTIPLEXER AND REFERENCE SELF TEST
The LTC6803 uses a multiplexer to measure the 12 bat-
tery cell inputs as well as the temperature signals. A
diagnostic command is used to validate the function of
the multiplexer, the temperature sensor, and the precision
reference circuit. Diagnostic registers will be updated after
each diagnostic test. The muxfail bit of the registers will
be 1 if the multiplexer self test fails.
A constant voltage generated by the 2nd reference circuit
will be measured by the ADC and the results written to the
diagnostic register. The voltage reading should be 2.5V
±16%. Readings outside this range indicate a failure of
the temperature sensor circuit, the precision reference
circuit, or the analog portion of the ADC. The DAGN com-
mand executes in 16.4ms, which is the sum of the 12-cell
t
CYCLE
and the 3 temperature t
CYCLE
. The diagnostic read
command can be used to read the registers.
USING THE GENERAL PURPOSE INPUTS/OUTPUTS
(GPIO1, GPIO2)
The LTC6803 has two general purpose digital input/output
pins. By writing a GPIO configuration register bit to a logic
low, the open-drain output can be activated. The GPIOs
give the user the ability to turn on/off circuitry around
the LTC6803. One example might be a circuit to verify the
operation of the system.
When a GPIO configuration bit is written to a logic high,
the corresponding GPIO pin may be used as an input.
The read back value of that bit will be the logic level that
appears at the GPIO pins.
WATCHDOG TIMER CIRCUIT
The LTC6803 includes a watchdog timer circuit. The
watchdog timer is on for all modes except CDC = 0. The
watchdog timer times out if no valid command is received
for 1 to 2.5 seconds. When the watchdog timer circuit
times out, the WDTB open-drain output is asserted low
and the configuration register bits are reset to their default
(power-up) state. In the power-up state, CDC is 0, the S
outputs are off and the IC is in the low power standby
mode. The WDTB pin remains low until a valid command
is received. The watchdog timer provides a means to turn
off cell discharging should communications to the MPU
be interrupted. There is no need for the watchdog timer
at CDC = 0 since discharging is off. The open-drain WDTB
output can be wire ORd with other external open-drain
signals. Pulling the WDTB signal low will not initiate a
watchdog event, but the CNFGO bit 7 will reflect the state
of this signal. Therefore, the WDTB pin can be used to
monitor external digital events if desired.
SERIAL PORT
Overview
The LTC6803-2/LTC6803-4 has an SPI bus compatible
serial port. Devices can be connected in parallel, using
digital isolators. Multiple devices are uniquely identified by
a part address determined by the A0 to A3 pins. Physical
Layer on the LTC6803-2/LTC6803-4, four pins comprise
the serial interface: CSBI, SCKI, SDI and SDO. The SDO
