UJA1066_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 17 March 2010 36 of 70
NXP Semiconductors
UJA1066
High-speed CAN fail-safe system basis chip
6.12.9 Physical Layer Control register and Physical Layer Control Feedback
register
These registers are used to configure the CAN transceiver. The settings can be read
back.
[1] For the CAN transceiver to enter Off-Line mode from On-line or On-line Listen mode a minimum time without bus activity is needed. This
minimum time t
off-line
is defined by COTC; see Section 6.7.1.4.
[2] In case of an RXDC / TXDC interfacing failure the CAN transmitter is disabled without setting CTC. Recovery from such a failure is
automatic when CAN communication (with correct interfacing levels) is received. Manual recovery is also possible by setting and
clearing the CTC bit under software control.
[3] Default value is 1; therefore this bit should be set to 0 by the application.
[4] Default value is 0; therefore this bit should be set to 1 by the application.
6.12.10 Special Mode register and Special Mode Feedback register
These registers are used to configure global SBC parameters during system start-up. The
settings can be read back.
Table 12. Physical Layer Control and Physical Layer Control Feedback register bit description
Bit Symbol Description Value Function
15 and 14 A1, A0 register address 11 select Physical Layer Control register
13 RRS Read Register Select 1 read the General Purpose Feedback register 1
0 read the Physical Layer Control Feedback register
12 RO Read Only 1 read the register selected by RRS without writing to the
Physical Layer Control register
0 read the register selected by RRS and write to Physical
Layer Control register
11 V2C V2 Control 1 V2 remains active in CAN Off-line mode
0 V2 is OFF in CAN Off-line mode
10 CPNC CAN Partial Networking
Control
1 CAN transceiver enters On-line Listen mode instead of
On-line mode; cleared whenever the SBC enters On-line
mode or Active mode
0 On-line Listen mode disabled
9 COTC CAN Off-line Time
Control
[1]
1t
off-line
long period (extended to t
off-line(ext)
after wake-up)
0t
off-line
short period (extended to t
off-line(ext)
after wake-up)
8 CTC CAN Transmitter
Control
[2]
1 CAN transmitter is disabled
0 CAN transmitter is enabled
7 CRC CAN Receiver Control 1 TXD signal is forwarded directly to RXD for self-test
purposes (loopback behavior); only if CTC = 1
0 TXD signal is not forwarded to RXD (normal behavior)
6 CMC CAN Mode Control 1 CAN Active mode (in Normal mode and Flash mode only)
0 CAN Active mode disabled
5 CSC CAN Split Control 1 CAN SPLIT pin active
0 CAN SPLIT pin floating
4 to 2 - reserved 000 reserved for SBCs with LIN transceiver
1 - reserved
[3]
0 reserved for SBCs with LIN transceiver
0 - reserved
[4]
1 reserved for SBCs with LIN transceiver
