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UJA1066TW/5V0/T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P70
UJA1066_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 17 March 2010 4 of 70
NXP Semiconductors
UJA1066
High-speed CAN fail-safe system basis chip
3. Ordering information
[1] UJA1066TW/5V0 is for the 5 V version; UJA1066TW/3V3 is for the 3.3 V version.
4. Block diagram
Table 1. Ordering information
Type number
[1]
Package
Name Description Version
UJA1066TW HTSSOP32 plastic thermal enhanced thin shrink small outline package; 32 leads;
body width 6.1 mm; lead pitch 0.65 mm; exposed die pad
SOT549-1
Fig 1. Block diagram
BAT42
BAT14
SYSINH
V3
INH/LIMP
INTN
TEST
SCK
SDI
SDO
SCS
GND
WAKE
SENSE
32
27
29
30
17
7
16
11
9
10
12
23
18
31
V1
V2
RSTN
EN
SPLIT
CANH
CANL
TXDC
RXDC
4
20
6
8
24
21
22
13
14
SBC
FAIL-SAFE
SYSTEM
V1 MONITOR
RESET/EN
WATCHDOG
OSCILLATOR
GND SHIFT
DETECTOR
BAT
MONITOR
V1
V2
HIGH
SPEED
CAN
SPI
CHIP
TEMPERATURE
WAKE
INH
BAT42
V2
001aag303
UJA1066
UJA1066_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 17 March 2010 5 of 70
NXP Semiconductors
UJA1066
High-speed CAN fail-safe system basis chip
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 2. Pin configuration
UJA1066TW
n.c. BAT42
n.c. SENSE
TEST1 V3
V1 SYSINH
TEST2 n.c.
RSTN BAT14
INTN TEST5
EN TEST4
SDI SPLIT
SDO GND
SCK CANL
SCS CANH
TXDC V2
RXDC n.c.
n.c. WAKE
TEST3 INH/LIMP
015aaa016
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18
17
20
19
22
21
24
23
26
25
32
31
30
29
28
27
Table 2. Pin description
Symbol Pin Description
n.c. 1 not connected
n.c. 2 not connected
i.c. 3 internally connected; must be left open in the application
V1 4 voltage regulator output for the microcontroller (3.3 V or 5 V depending on the
SBC version)
i.c. 5 internally connected; must be left open in the application
RSTN 6 reset output to microcontroller (active LOW; will detect clamping situations)
INTN 7 interrupt output to microcontroller (active LOW; open-drain; wire-AND this pin to
other ECU interrupt outputs)
EN 8 enable output (active HIGH; push-pull; LOW with every reset/watchdog
overflow)
SDI 9 SPI data input
SDO 10 SPI data output (floating when pin SCS is HIGH)
SCK 11 SPI clock input
SCS 12 SPI chip select input (active LOW)
TXDC 13 CAN transmit data input (LOW when dominant; HIGH when recessive)
RXDC 14 CAN receive data output (LOW when dominant; HIGH when recessive)
n.c. 15 not connected
TEST 16 test pin (should be connected to ground in the application)
UJA1066_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 17 March 2010 6 of 70
NXP Semiconductors
UJA1066
High-speed CAN fail-safe system basis chip
The exposed die pad at the bottom of the package allows better dissipation of heat from
the SBC via the printed-circuit board. The exposed die pad is not connected to any active
part of the IC and can be left floating, or can be connected to GND for the best EMC
performance.
INH/LIMP 17 inhibit/limp-home output (BAT14 related, push-pull, default floating)
WAKE 18 local wake-up input (BAT42 related, continuous or cyclic sampling)
n.c. 19 not connected
V2 20 5 V voltage regulator output for CAN; connect a buffer capacitor to this pin
CANH 21 CANH bus line (HIGH in dominant state)
CANL 22 CANL bus line (LOW in dominant state)
GND 23 ground
SPLIT 24 CAN-bus common mode stabilization output
i.c. 25 internally connected; must be connected to pin BAT42 in the application
i.c. 26 internally connected; must be left open in the application
BAT14 27 14 V battery supply input
n.c. 28 not connected
SYSINH 29 system inhibit output; BAT42 related (e.g. for controlling external DC-to-DC
converter)
V3 30 unregulated 42 V output (BAT42 related; continuous output or Cyclic mode
synchronized with local wake-up input)
SENSE 31 fast battery interrupt / chatter detector input
BAT42 32 42 V battery supply input (connect this pin to BAT14 in 14 V applications)
Table 2. Pin description
…continued
Symbol Pin Description
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P70

UJA1066TW/5V0/T

Mfr. #:
Buy UJA1066TW/5V0/T
Manufacturer:
NXP Semiconductors
Description:
CAN Interface IC IC CAN/LIN FAIL-SAFE HS 32
Lifecycle:
New from this manufacturer.
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