UJA1066_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 17 March 2010 38 of 70
NXP Semiconductors
UJA1066
High-speed CAN fail-safe system basis chip
6.12.11 General Purpose registers and General Purpose Feedback registers
The UJA1066 contains two 12-bit General Purpose registers (and accompanying General
Purpose Feedback registers) without predefined bit definitions. These registers can be
used by the microcontroller for advanced system diagnosis or for storing critical system
status information outside the microcontroller. After Power-up, General Purpose register 0
will contain a ‘Device Identification Code’ consisting of the SBC type and SBC version.
This code is available until it is overwritten by the microcontroller (as indicated by the DIC
bit).
[1] The Device Identification Control bit is cleared during power-up of the SBC, indicating that General Purpose register 0 is loaded with the
Device Identification Code. Any write access to General Purpose register 0 will set the DIC bit, regardless of the value written to DIC.
[2] During power-up the General Purpose register 0 is loaded with a ‘Device Identification Code’ consisting of the SBC type and SBC
version, and the DIC bit is cleared.
6.12.12 Register configurations at reset
At Power-on, Start-up and Restart mode the setting of the SBC registers is predefined.
Table 14. General Purpose register 0 and General Purpose Feedback register 0 bit description
Bit Symbol Description Value Function
15, 14 A1, A0 register address 10 read the General Purpose Feedback register 0
13 RRS read register select 1 read the General Purpose Feedback register 0
0 read the System Configuration Feedback register
12 RO read only 1 read the register selected by RRS without writing to the
General Purpose register 0
0 read the register selected by RRS and write to the General
Purpose register 0
11 DIC device identification
control
[1]
1 General Purpose register 0 contains user-defined bits
0 General Purpose register 0 contains the Device
Identification Code
10 to 0 GP0[10:0] general purpose bits
[2]
1 user-defined
0 user-defined
Table 15. General Purpose register 1 and General Purpose Feedback register 1 bit description
Bit Symbol Description Value Function
15 and 14 A1, A0 register address 11 select General Purpose register 1
13 RRS read register select 1 read the General Purpose Feedback register 1
0 read the Physical Layer Control Feedback register
12 RO read only 1 read the register selected by RRS without writing to the
General Purpose register 1
0 read the register selected by RRS and write to the General
Purpose register
11 to 0 GP1[11:0] general purpose bits 1 user-defined
0 user-defined
