SC16IS752_SC16IS762 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9 — 22 March 2012 46 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
Fig 21. SCL delay after reset
002aab437
RESET
SCL
t
d15
t
w(rst)
Rise and fall times refer to V
IL
and V
IH
.
Fig 22. I
2
C-bus timing diagram
SCL
SDA
t
HD;STA
t
SU;DAT
t
HD;DAT
t
f
t
BUF
t
SU;STA
t
LOW
t
HIGH
t
VD;ACK
002aab489
t
SU;STO
protocol
START
condition
(S)
bit 7
MSB
(A7)
bit 6
(A6)
bit 0
LSB
(R/W)
acknowledge
(A)
STOP
condition
(P)
1
/f
SCL
t
r
t
VD;DAT
t
SP
Fig 23. Write to output
002aab255
AW
SDA
A
GPIOn
DATA
A
IOSTATE REG.
SLAVE ADDRESS
A
t
d1
Fig 24. Modem input pin interrupt
002aab256
AW
SDA
A R
IRQ
t
d2
S A
DATA
A
ACK to master
SLAVE ADDRESSMSR REGISTER
SLAVE ADDRESS
A
t
d3
MODEM pin
SC16IS752_SC16IS762 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9 — 22 March 2012 47 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
Fig 25. GPIO pin interrupt
002aab257
AW
SDA
A R
IRQ
t
d4
S A
DATA
A
ACK from master
SLAVE ADDRESSIOSTATE REG.
SLAVE ADDRESS
A
t
d5
GPIOn
P
ACK from slaveACK from slave
Fig 26. Receive interrupt
D0 D1 D2 D3 D4 D5 D6 D7
002aab258
next
start
bit
stop
bit
start
bit
t
d6
RX
IRQ
Fig 27. Receive interrupt clear
002aab259
AW
SDA
A R
IRQ
S A
DATA
A
SLAVE ADDRESSRHR
SLAVE ADDRESS
A
t
d7
P
Fig 28. Transmit interrupt clear
002aab260
AW
SDA
IRQ
A
DATA
A
THR REGISTER
SLAVE ADDRESS
A
t
d8
SC16IS752_SC16IS762 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9 — 22 March 2012 48 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
[1] Applies to external clock, crystal oscillator max. 24 MHz.
[2]
Table 38. f
XTAL
dynamic characteristics
V
DD
=2.5V
0.2 V, T
amb
=
40
Cto+85
C; or V
DD
=3.3V
0.3 V, T
amb
=
40
Cto+95
C.
Symbol Parameter Conditions V
DD
=2.5V V
DD
=3.3V Unit
Min Max Min Max
t
w1
clock pulse duration HIGH level 10 - 6 - ns
t
w2
clock pulse duration LOW level 10 - 6 - ns
f
XTAL
oscillator/clock frequency
[1][2]
-48-80MHz
f
XTAL
1
t
w3
-------
=
Fig 29. External clock timing
EXTERNAL
CLOCK
002aac020
t
w3
t
w2
t
w1

SC16IS752IBS,128

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
UART Interface IC I2C/SPI-UARTBRIDGE
Lifecycle:
New from this manufacturer.
Delivery:
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