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SC16IS752IBS,128
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P36
P37-P39
P40-P42
P43-P45
P46-P48
P49-P51
P52-P54
P55-P57
P58-P60
SC16IS752_SC16IS76
2
All information pr
ovided in this d
ocument is su
bject to legal dis
claimers.
© NXP B.V
. 201
2. All rights rese
rv
ed.
Product data sheet
Rev
. 9 —
22 March 2012
46 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byt
e FIFOs, IrDA SIR
Fig 21.
SCL delay
after reset
002aab437
RESET
SCL
t
d15
t
w(rst)
Rise and fall times refer to V
IL
and V
IH
.
Fig 22.
I
2
C-bus timing diagram
SCL
SD
A
t
HD;ST
A
t
SU;DA
T
t
HD;DA
T
t
f
t
BUF
t
SU;ST
A
t
LOW
t
HIGH
t
VD;ACK
002aab489
t
SU;STO
protocol
ST
ART
condition
(S)
bit 7
MSB
(A7)
bit 6
(A6)
bit 0
LSB
(R/W)
acknowledge
(A)
ST
OP
condition
(P)
1
/f
SCL
t
r
t
VD;DA
T
t
SP
Fig 23.
W
rite to output
002aab255
A
W
SDA
A
GPIOn
DATA
A
IOSTATE REG.
SLAVE ADDRESS
A
t
d1
Fig 24.
M
odem input p
in interrupt
002aab256
A
W
SDA
A
R
IRQ
t
d2
S
A
DATA
A
ACK to master
SLAVE ADDRESS
MSR REGISTER
SLAVE ADDRESS
A
t
d3
MODEM pin
SC16IS752_SC16IS76
2
All information pr
ovided in this d
ocument is su
bject to legal dis
claimers.
© NXP B.V
. 201
2. All rights rese
rv
ed.
Product data sheet
Rev
. 9 —
22 March 2012
47 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byt
e FIFOs, IrDA SIR
Fig 25.
GPIO pin
interrupt
002aab257
A
W
SDA
A
R
IRQ
t
d4
S
A
DATA
A
ACK from master
SLAVE ADDRESS
IOSTATE REG.
SLAVE ADDRESS
A
t
d5
GPIOn
P
ACK from slave
ACK from slave
Fig 26.
Receive inter
rupt
D0
D1
D2
D3
D4
D5
D6
D7
002aab258
next
star
t
bit
stop
bit
star
t
bit
t
d6
RX
IRQ
Fig 27.
Rec
eive interr
upt clear
002aab259
A
W
SDA
A
R
IRQ
S
A
DATA
A
SLAVE ADDRESS
RHR
SLAVE ADDRESS
A
t
d7
P
Fig 28.
T
ransmit interrup
t clear
002aab260
A
W
SDA
IRQ
A
DATA
A
THR REGISTER
SLAVE ADDRESS
A
t
d8
SC16IS752_SC16IS76
2
All information pr
ovided in this d
ocument is su
bject to legal dis
claimers.
© NXP B.V
. 201
2. All rights rese
rv
ed.
Product data sheet
Rev
. 9 —
22 March 2012
48 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byt
e FIFOs, IrDA SIR
[1]
Applies to external clock,
crystal oscill
ator max. 24 MHz.
[2]
T
able 38
.
f
XT
AL
dynamic character
istics
V
DD
=2
.
5V
0.2 V
, T
amb
=
40
Ct
o+
8
5
C; or V
DD
=3
.
3V
0.3 V
, T
amb
=
40
Ct
o
+
9
5
C.
Symbol
Parameter
Conditions
V
DD
=2
.
5V
V
DD
=3
.
3V
Unit
Min
Max
Min
Max
t
w1
clock pulse duration
HIGH level
10
-
6
-
ns
t
w2
clock pulse duration
LOW level
10
-
6
-
ns
f
XT
AL
oscillator/clock frequency
[1][2]
-4
8-8
0
M
H
z
f
XTAL
1
t
w3
------
-
=
Fig 29.
External clock timing
EXTERNAL
CLOCK
002aac020
t
w3
t
w2
t
w1
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P36
P37-P39
P40-P42
P43-P45
P46-P48
P49-P51
P52-P54
P55-P57
P58-P60
SC16IS752IBS,128
Mfr. #:
Buy SC16IS752IBS,128
Manufacturer:
NXP Semiconductors
Description:
UART Interface IC I2C/SPI-UARTBRIDGE
Lifecycle:
New from this manufacturer.
Delivery:
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