SC16IS752_SC16IS762 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9 — 22 March 2012 55 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
Solder bath specifications, including temperature and impurities
17.4 Reflow soldering
Key characteristics in reflow soldering are:
Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 39
) than a SnPb process, thus
reducing the process window
Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 40
and 41
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 39
.
Table 40. SnPb eutectic process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (C)
Volume (mm
3
)
< 350 350
< 2.5 235 220
2.5 220 220
Table 41. Lead-free process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (C)
Volume (mm
3
)
< 350 350 to 2000 > 2000
< 1.6 260 260 260
1.6 to 2.5 260 250 245
> 2.5 250 245 245
SC16IS752_SC16IS762 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9 — 22 March 2012 56 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
18. Appendix
18.1 Errata for Rev. E added 12 August 2011
18.1.1 IrDA wake-up
In Rev. D, the UART cannot wake up through RX pin once the UART is put to sleep by the
host.
18.1.2 Clearing of RX FIFO overflow
In Rev. D, once the receive FIFO overflows, the receive FIFO cannot be cleared with FIFO
reset command if the UART is continuously receiving data.
18.1.3 Interrupt priority encoder
When the edge of the IOR signal (an internal signal that reads IIR register) comes close to
the X1 clock that generates the interrupt, the value of the Interrupt Indication Register (IIR)
might not be correct. This issue might occur if the X1 clock is very slow and the host read
operation is very fast in response to the interrupt from the UART.
18.1.4 Time-out interrupt
If the host reads the receive FIFO at the at the same time as a time-out interrupt condition
happens, the host might read 0xCC (time-out) in the Interrupt Indication Register (IIR), but
bit 0 of the Line Status Register (LSR) is not set (means there is not data in the
receive FIFO). This is a conflict of the receive FIFO status when IIR = 0xCC (time-out), it
indicates that there are data in the receive FIFO, but LSR bit 0 = 0 indicates otherwise.
MSL: Moisture Sensitivity Level
Fig 39. Temperature profiles for large and small components
001aac844
temperature
time
minimum peak temperature
= minimum soldering temperature
maximum peak temperature
= MSL limit, damage level
peak
temperature
SC16IS752_SC16IS762 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 9 — 22 March 2012 57 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
19. Abbreviations
20. Revision history
Table 42. Abbreviations
Acronym Description
CPU Central Processing Unit
DLL Divisor Latch LSB
DLH Divisor Latch MSB
FIFO First In, First Out
GPIO General Purpose Input/Output
I
2
C-bus Inter IC bus
IrDA Infrared Data Association
LCD Liquid Crystal Display
MIR Medium InfraRed
POR Power-On Reset
SIR Serial InfraRed
SPI Serial Peripheral Interface
SPR ScratchPad Register
UART Universal Asynchronous Receiver/Transmitter
Table 43. Revision history
Document ID Release date Data sheet status Change notice Supersedes
SC16IS752_SC16IS762 v.9 20120322 Product data sheet - SC16IS752_SC16IS762 v.8
Modifications:
Table 6 “Summary of interrupt control functions: IIR[5:0] for interrupt type “I/O pins”
corrected from “00 1110” to “11 0000'
SC16IS752_SC16IS762 v.8 20110901 Product data sheet - SC16IS752_SC16IS762 v.7
SC16IS752_SC16IS762 v.7 20080519 Product data sheet - SC16IS752_SC16IS762 v.6
SC16IS752_SC16IS762 v.6 20061219 Product data sheet - SC16IS752_SC16IS762 v.5
SC16IS752_SC16IS762 v.5 20061128 Product data sheet - SC16IS752_SC16IS762 v.4
SC16IS752_SC16IS762 v.4 20061013 Product data sheet - SC16IS752_SC16IS762 v.3
SC16IS752_SC16IS762 v.3 20060707 Product data sheet - SC16IS752_SC16IS762 v.2
SC16IS752_SC16IS762 v.2 20060330 Product data sheet - SC16IS752_SC16IS762 v.1
SC16IS752_SC16IS762 v.1 20060104 Product data sheet - -

SC16IS752IBS,128

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
UART Interface IC I2C/SPI-UARTBRIDGE
Lifecycle:
New from this manufacturer.
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