System-on-Chip LH79524/LH79525
Data Sheet for Rev. A.1 Silicon Version 1.0 45
Color LCD Controller Timing Diagrams
Figure 26. STN Horizontal Timing
VDD
See
Note 2
DISPLAY-DEPENDENT
TURN-ON DELAY
1 STN FRAME
PANEL POSITIVE HIGH-VOLTAGE SUPPLY ACTIVE
PANEL NEGATIVE HIGH-VOLTAGE SUPPLY ACTIVE
PANEL LOGIC ACTIVE
PANEL DATA CLOCK ACTIVE
DATA ENABLE
SEE 'STN HORIZONTAL TIMING DIAGRAM'
ENUMERATED IN
HORIZONTAL 'LINES'
FRONT PORCH
ALL 'LINES' FOR ONE FRAME
VSS
LCDVDDEN
(DIGITAL SUPPLY
ENABLE FOR
HIGH-VOLTAGE
SUPPLIES)
LCDDCLK
(PANEL CLOCK)
TIMING2:PCD
TIMING2: BCD
TIMING2: IPC
TIMING2: CPL
LCDEN
(DATA ENABLE)
TIMING2:ACB
TIMING2: IOE
LCDFP
(VERTICAL
SYNCHRONIZATION
PULSE)
TIMING1: IVS
(See Note 3)
PIXEL DATA AND
HORIZONTAL
CONTROL
SIGNALS FOR
ONE FRAME
NOTES:
1. Signal polarties may vary for some displays.
2. See 'STN horizontal timing' diagram.
3. LCDFP with TIMING1:VSW = 0 is only a single horizontal ine period.
DISPLAY
DEPENDENT
TURN-OFF DELAY
TIMING1: LPP TIMING1: VFP
TIMING1: VSW = 1
LH79525-44
