ZL50017 Data Sheet
44
Zarlink Semiconductor Inc.
† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C, VDD_CORE at 1.8 V and VDD_IO at 3.3 V and are for design aid only: not guaranteed and not subject to produc-
tion testing.
† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C, VDD_CORE at 1.8 V and VDD_IO at 3.3 V and are for design aid only: not guaranteed and not subject to produc-
tion testing.
AC Electrical Characteristics
†
- FPi and CKi Timing when CKIN1-0 bits = 00 (16.384 MHz)
Characteristic Sym. Min. Typ.
‡
Max. Units Notes
1 FPi Input Frame Pulse Width t
FPIW
40 61 115 ns
2 FPi Input Frame Pulse Setup Time t
FPIS
20 ns
3 FPi Input Frame Pulse Hold Time t
FPIH
20 ns
4 CKi Input Clock Period t
CKIP
55 61 67 ns
5 CKi Input Clock High Time t
CKIH
27 34 ns
6 CKi Input Clock Low Time t
CKIL
27 34 ns
7 CKi Input Clock Rise/Fall Time t
r
CKi, t
f
CKi 3 ns
8 CKi Input Clock Cycle to Cycle Variation t
CVC
020ns
AC Electrical Characteristics
†
- FPi and CKi Timing when CKIN1-0 bits = 01 (8.192 MHz)
Characteristic Sym. Min. Typ.
‡
Max. Units Notes
1 FPi Input Frame Pulse Width t
FPIW
90 122 220 ns
2 FPi Input Frame Pulse Setup Time t
FPIS
45 ns
3 FPi Input Frame Pulse Hold Time t
FPIH
45 ns
4 CKi Input Clock Period t
CKIP
110 122 135 ns
5 CKi Input Clock High Time t
CKIH
55 69 ns
6 CKi Input Clock Low Time t
CKIL
55 69 ns
7 CKi Input Clock Rise/Fall Time t
r
CKi, t
f
CKi 3 ns
8 CKi Input Clock Cycle to Cycle Variation t
CVC
020ns
