WRITE DISABLE
The WRITE DISABLE command resets the write enable latch (WEL) bit.
The WRITE DISABLE command is entered by driving chip select (S#) LOW, sending the
command code, and then driving S# HIGH.
The WEL bit is reset under the following conditions:
• Power-up
• Completion of any ERASE operation
• Completion of any PROGRAM operation
• Completion of any WRITE STATUS REGISTER operation
• Completion of WRITE DISABLE operation
Figure 9: WRITE DISABLE Command Sequence
Don’t Care
DQ[0]
0
1 2 4 53 76
C
High-Z
DQ1
MSB
LSB
0 0 0 0 0 001
Command bits
S#
M25P128 Serial Flash Embedded Memory
WRITE DISABLE
CCMTD-1718347970-10412
m25p_128.pdf - Rev. A 11/16 EN
18
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