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(5) Acceptable commands after Serial Input command “80h”
Once the Serial Input command “80h” has been input, do not input any command other than the Column
Address Change in Serial Data Input command “85h”, Auto Program command “10h”, Multi Page Program
command “11h”, Auto Program with Data Cache Command “15h”, or the Reset command “FFh”.
If a command other than “85h” , “10h” , “11h” , “15h” or “FFh” is input, the Program operation is not
performed and the device operation is set to the mode which the input command specifies.
(6) Addressing for program operation
Within a block, the pages must be programmed consecutively from the LSB (least significant bit) page of
the block to MSB (most significant bit) page of the block. Random page address programming is prohibited.
DATA IN: Data (1)
Page 0
Data register
Page 2
Page 1
Page 31
Page 63
(1)
(2)
(3)
(32)
(64)
Data (64)
From the LSB page to MSB page
DATA IN: Data (1)
Page 0
Data register
Page 2
Page 1
Page 31
Page 63
(2)
(32)
(3)
(1)
(64)
Data (64)
Ex.) Random page program (Prohibition)
Command other than
“85h”, “10h”, “11h”, “15h” or “FFh”
80
Programming cannot be executed.
10XX
Mode specified by the command.
WE
BY/RY
80 FF
Address input
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(7) Status Read during a Read operation
The device status can be read out by inputting the Status Read command “70h” in Read mode. Once the
device has been set to Status Read mode by a “70h” command, the device will not return to Read mode
unless the Read command “00h” is inputted during [A]. If the Read command “00h” is inputted during [A],
Status Read mode is reset, and the device returns to Read mode. In this case, data output starts
automatically from address N and address input is unnecessary
(8) Auto programming failure
(9)
BY/RY : termination for the Ready/Busy pin ( BY/RY )
A pull-up resistor needs to be used for termination because the BY/RY buffer consists of an open drain
circuit.
Fail
80 108010
Address
M
Data
input
70 I/O
Address
N
Data
input
If the programming result for page address M is Fail, do not try to program the
page to address N in another block without the data input sequence.
Because the previous input data has been lost, the same input sequence of 80h
command, address and data is necessary.
10
80
M
N
This data may vary from device to device.
We recommend that you use this data as a
reference when selecting a resistor value.
V
CC
V
CC
Device
V
SS
R
BY/RY
C
L
1.5
μs
1.0 μs
0.5
μs
0
1 K
Ω 4 KΩ3 KΩ2 KΩ
15 ns
10 ns
5 ns
t
f
t
r
R
t
r
t
f
V
CC
= 3.3 V
Ta
= 25°C
C
L
= 100 pF
t
f
Ready
V
CC
t
r
Busy
00
Address N
Command
CE
WE
BY/RY
RE
[A]
Status Read
command input
Status Read
Status output
.
70
00
30
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(10) Note regarding the WP signal
The Erase and Program operations are automatically reset when WP goes Low. The operations are
enabled and disabled as follows:
Enable Programming
Disable Programming
Enable Erasing
Disable Erasing
WP
t
WW
(100 ns MIN)
80 10
WE
BY/RY
DIN
WP
t
WW
(100 ns MIN)
60 D0
WE
BY/RY
DIN
WP
t
WW
(100 ns MIN)
80 10
WE
BY/RY
DIN
WP
t
WW
(100 ns MIN)
60 D0
WE
BY/RY
DIN

TC58NVG1S3ETAI0

Mfr. #:
Manufacturer:
Toshiba Memory
Description:
NAND Flash 3.3V 2Gb 43nm SLC NAND (EEPROM)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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