OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

P87LPC778FDH,529

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P78P79-P79
Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data Rev. 01 — 31 March 2004 19 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.5.2 Internal reference voltage
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to
as Vref, is 1.28 V ±10 %.
8.5.3 Comparator interrupt
Each comparator has an interrupt flag CMFn contained in its configuration register.
This flag is set whenever the comparator output changes state. The flag may be
polled by software or may be used to generate an interrupt. The interrupt will be
generated when the corresponding enable bit ECn in the IEN1 register is set and the
interrupt system is enabled via the EA bit in the IEN0 register.
8.5.4 Comparators and power reduction modes
Either or both comparators may remain enabled when Power-down or Idle mode is
activated. The comparators will continue to function in the power reduction mode. If a
comparator interrupt is enabled, a change of the comparator output state will
generate an interrupt and wake up the processor. If the comparator output to a pin is
enabled, the pin should be configured in the push-pull mode in order to obtain fast
switching times while in Power-down mode. The reason is that with the oscillator
stopped, the temporary strong pull-up that normally occurs during switching on a
quasi-bidirectional port pin does not take place.
Comparators consume power in Power-down and Idle modes, as well as in the
normal operating mode. This fact should be taken into account when system power
consumption is an issue.
a. CPn, CNn, OEn=000 b. CPn, CNn, OEn=001
c. CPn, CNn, OEn=010 d. CPn, CNn, OEn=011
e. CPn, CNn, OEn=100 f. CPn, CNn, OEn=101
g. CPn, CNn, OEn=110 h. CPn, CNn, OEn=111
Fig 7. Comparator configurations.
CINnA
CMPREF
002aaa618
COn
CINnA
CMPREF
002aaa620
COn
CMPn
CINnA
V
REF
(1.23V)
002aaa621
COn
CINnA
V
REF
(1.23 V)
002aaa622
COn
CMPn
CINnB
CMPREF
002aaa623
COn
CINnB
CMPREF
002aaa624
COn
CMPn
CINnB
V
REF
(1.23V)
002aaa625
COn
CINnB
V
REF
(1.23 V)
002aaa626
COn
CMPn
Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data Rev. 01 — 31 March 2004 20 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.5.5 Comparator configuration example
The code shown below is an example of initializing one comparator. Comparator 1 is
configured to use the CIN1A and CMPREF inputs, outputs the comparator result to
the CMP1 pin, and generates an interrupt when the comparator output changes.
CmpInit: b
mov PT0AD,#30h ; Disable digital inputs on pins that are used
; for analog functions: CIN1A, CMPREF.
anl P0M2,#0cfh ; Disable digital outputs on pins that are used
orl P0M1,#30h ; for analog functions: CIN1A, CMPREF.
mov CMP1,#24h ; Turn on comparator 1 and set up for:
; - Positive input on CIN1A.
; - Negative input from CMPREF pin.
; - Output to CMP1 pin enabled.
call delay10us ; The comparator has to start up for at
; least 10 microseconds before use.
anl CMP1,#0feh ; Clear comparator 1 interrupt flag.
setb EC1 ; Enable the comparator 1 interrupt. The
; priority is left at the current value.
setb EA ; Enable the interrupt system (if needed).
ret ; Return to caller.
The interrupt routine used for the comparator must clear the interrupt flag (CMF1 in
this case) before returning.
8.6 Pulse width modulator
The P87LPC778 contains four Pulse Width Modulated (PWM) channels which can
generate pulses of programmable length and interval.
The output for PWM0 is on P0.1, PWM1 on P1.6, PWM2 on P1.7 and PWM3 on
P0.0.
After chip reset the output of the each PWM channel is reflect by the setting of
UCFG1.5, PRHI, if set to a zero the outputs are low, if set to one the outputs are high.
In this case PRHI is set to zero, before the pin will reflect the state of the internal
PWM output a ‘1’ must be written to each port bit that serves as a PWM output.
A block diagram is shown in Figure 8.
The interval between successive outputs is controlled by a 10–bit down counter
which uses the internal microcontroller clock as its input.
When bit 3 in the UCFG1 register is a ‘1’ (6-clock mode) the microcontroller clock,
and therefore the PWM counter clock, has the same frequency as the clock source:
(2)
When bit 3 in the UCFG1 register is a ‘0’ (12-clock mode) the microcontroller and
PWM counter clocks operate at half the frequency of clock source:
(3)
f
CPWM
f
OSC
=
f
CPWM
f
OSC
2
------------
=
Philips Semiconductors
P87LPC778
CMOS single-chip 8-bit microcontroller
Product data Rev. 01 — 31 March 2004 21 of 79
9397 750 12378
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
When the counter reaches underflow it is reloaded with a user selectable value. This
mechanism allows the user to set the PWM frequency at any integer sub-multiple of
the microcontroller clock frequency. The repetition frequency of the PWM is given by:
(4)
Where CNSW is contained in SFRs CNSW0 and CNSW1 as a 10-bit value,
described in the following tables.
The word ‘Shadow’ refers to the fact that writes are not into the register that controls
the counter; rather they are into a holding register.
As described below the transfer of data from this holding register, into the register
which contains the actual reload value, is controlled by the user’s program, by setting
the XFER bit and waiting till the next underflow of the counter.
Table 11: CNSW0 - Counter shadow register 0 (address 0D1H) bit allocation
Reset value: FFH
Bit 7 6 5 4 3 2 1 0
Symbol CNSW7 CNSW6 CNSW5 CNSW4 CNSW3 CNSW2 CNSW1 CNSW0
Table 12: CNSW1 - Counter shadow register 1 (address 0D2H) bit allocation
Reset value: FFH
Bit 7 6 5 4 3 2 1 0
Symbol Unused Unused Unused Unused Unused Unused CNSW9 CNSW8
f
PWM
f
CPWM
CNSW 1+()
-------------------------------
=
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P78P79-P79

P87LPC778FDH,529

Mfr. #:
Buy P87LPC778FDH,529
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 8KB OTP 20TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet